From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:50439) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TCWZB-0003Vq-N5 for qemu-devel@nongnu.org; Fri, 14 Sep 2012 10:08:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TCWZ9-0004jl-PW for qemu-devel@nongnu.org; Fri, 14 Sep 2012 10:08:21 -0400 Received: from mx1.redhat.com ([209.132.183.28]:11210) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TCWZ9-0004jM-H8 for qemu-devel@nongnu.org; Fri, 14 Sep 2012 10:08:19 -0400 Date: Fri, 14 Sep 2012 10:08:16 -0400 From: Jason Baron Message-ID: <20120914140815.GB1821@redhat.com> References: <20120914135053.GA1821@redhat.com> <9F95DC1F-AE17-473D-B8C0-3C6586C9FB5E@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9F95DC1F-AE17-473D-B8C0-3C6586C9FB5E@suse.de> Subject: Re: [Qemu-devel] [PATCH 00/25] q35 series take #1 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: aliguori@us.ibm.com, juzhang@redhat.com, mst@redhat.com, jan.kiszka@siemens.com, qemu-devel@nongnu.org, armbru@redhat.com, yamahata@valinux.co.jp, alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com, mkletzan@redhat.com, lcapitulino@redhat.com, afaerber@suse.de On Fri, Sep 14, 2012 at 03:56:17PM +0200, Alexander Graf wrote: > On 14.09.2012, at 15:50, Jason Baron wrote: > > > On Fri, Sep 14, 2012 at 12:29:17AM +0200, Alexander Graf wrote: > >> On 13.09.2012, at 22:12, Jason Baron wrote: > >> > >>> Hi, > >>> > >>> Qemu bits for q35 support, I'm posting the seabios changes separately. The > >>> patches require '-M pc_q35' and -L 'seabios dir with q35 changes' on the > >>> qemu command line. Hopefully, we can make it the default for x86 at some future > >>> point when we feel comfortable with it. > >> > >> Without having had a real look at the code in detail yet, how did you design the PCI-ISA bridge (LPC device)? I'm asking mostly because Mac OS X unconditionally accesses that device's PCI config space to find the base address of the HPET. > >> > > > > The LPC device is inherits from TYPE_PCI_DEVICE, and has modeling for > > configuring pmbase (where the power management io region resides) and > > for configuring pirq irq routing. It does not have the addr for the > > HPET. I'll have to check the spec and see where it resides. > > I have a patch that creates a fake lpc device with the correct regions to make osx happy: > > http://svn.exactcode.de/t2/trunk/package/emulators/kvm/03-qemu-lpc.patch.disable > > That might be useful as a starting point :). > cool! I'll pull in the bits I'm missing. Thanks, -Jason