From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:40102) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TE0os-0008Sv-8d for qemu-devel@nongnu.org; Tue, 18 Sep 2012 12:38:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TE0oq-0003DI-Fm for qemu-devel@nongnu.org; Tue, 18 Sep 2012 12:38:42 -0400 Received: from hall.aurel32.net ([88.191.126.93]:44288) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TE0oq-0003D4-8A for qemu-devel@nongnu.org; Tue, 18 Sep 2012 12:38:40 -0400 Date: Tue, 18 Sep 2012 18:38:32 +0200 From: Aurelien Jarno Message-ID: <20120918163832.GA22644@ohm.aurel32.net> References: <1347917713-23343-1-git-send-email-rth@twiddle.net> <1347917713-23343-2-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1347917713-23343-2-git-send-email-rth@twiddle.net> Subject: Re: [Qemu-devel] [PATCH 1/7] target-mips: Set opn in gen_ldst_multiple. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Mon, Sep 17, 2012 at 02:35:07PM -0700, Richard Henderson wrote: > Used by MIPS_DEBUG, when enabled. > > Signed-off-by: Richard Henderson > --- > target-mips/translate.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/target-mips/translate.c b/target-mips/translate.c > index 52eeb2b..50153a9 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -9855,6 +9855,7 @@ static void gen_andi16 (CPUMIPSState *env, DisasContext *ctx) > static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist, > int base, int16_t offset) > { > + const char *opn = "ldst_multiple"; > TCGv t0, t1; > TCGv_i32 t2; > > @@ -9874,19 +9875,24 @@ static void gen_ldst_multiple (DisasContext *ctx, uint32_t opc, int reglist, > switch (opc) { > case LWM32: > gen_helper_lwm(cpu_env, t0, t1, t2); > + opn = "lwm"; > break; > case SWM32: > gen_helper_swm(cpu_env, t0, t1, t2); > + opn = "swm"; > break; > #ifdef TARGET_MIPS64 > case LDM: > gen_helper_ldm(cpu_env, t0, t1, t2); > + opn = "ldm"; > break; > case SDM: > gen_helper_sdm(cpu_env, t0, t1, t2); > + opn = "sdm"; > break; > #endif > } > + (void)opn; > MIPS_DEBUG("%s, %x, %d(%s)", opn, reglist, offset, regnames[base]); > tcg_temp_free(t0); > tcg_temp_free(t1); > -- > 1.7.11.4 > Looks fine to me. Acked-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net