From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34072) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TEQIv-0005PZ-Il for qemu-devel@nongnu.org; Wed, 19 Sep 2012 15:51:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TEQIq-0005JE-Ap for qemu-devel@nongnu.org; Wed, 19 Sep 2012 15:51:25 -0400 Date: Wed, 19 Sep 2012 21:51:10 +0200 From: Aurelien Jarno Message-ID: <20120919195110.GA11273@ohm.aurel32.net> References: <1347976422-2859-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1347976422-2859-1-git-send-email-peter.maydell@linaro.org> Subject: Re: [Qemu-devel] [PATCH] hw/pflash_cfi0[12]: Use host-utils.h ctz32() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-trivial@nongnu.org, qemu-devel@nongnu.org, patches@linaro.org On Tue, Sep 18, 2012 at 02:53:42PM +0100, Peter Maydell wrote: > Drop the private reimplementation of ctz32() from pflash_cfi0[12] > in favour of using the standard version from host-utils.h. > > Signed-off-by: Peter Maydell > --- > hw/pflash_cfi01.c | 37 +------------------------------------ > hw/pflash_cfi02.c | 37 +------------------------------------ > 2 files changed, 2 insertions(+), 72 deletions(-) > > diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c > index d1c7423..00f1cdd 100644 > --- a/hw/pflash_cfi01.c > +++ b/hw/pflash_cfi01.c > @@ -41,6 +41,7 @@ > #include "block.h" > #include "qemu-timer.h" > #include "exec-memory.h" > +#include "host-utils.h" > > #define PFLASH_BUG(fmt, ...) \ > do { \ > @@ -543,42 +544,6 @@ static const MemoryRegionOps pflash_cfi01_ops_le = { > .endianness = DEVICE_NATIVE_ENDIAN, > }; > > -/* Count trailing zeroes of a 32 bits quantity */ > -static int ctz32 (uint32_t n) > -{ > - int ret; > - > - ret = 0; > - if (!(n & 0xFFFF)) { > - ret += 16; > - n = n >> 16; > - } > - if (!(n & 0xFF)) { > - ret += 8; > - n = n >> 8; > - } > - if (!(n & 0xF)) { > - ret += 4; > - n = n >> 4; > - } > - if (!(n & 0x3)) { > - ret += 2; > - n = n >> 2; > - } > - if (!(n & 0x1)) { > - ret++; > -#if 0 /* This is not necessary as n is never 0 */ > - n = n >> 1; > -#endif > - } > -#if 0 /* This is not necessary as n is never 0 */ > - if (!n) > - ret++; > -#endif > - > - return ret; > -} > - > pflash_t *pflash_cfi01_register(target_phys_addr_t base, > DeviceState *qdev, const char *name, > target_phys_addr_t size, > diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c > index 3e2002e..8cb1549 100644 > --- a/hw/pflash_cfi02.c > +++ b/hw/pflash_cfi02.c > @@ -40,6 +40,7 @@ > #include "qemu-timer.h" > #include "block.h" > #include "exec-memory.h" > +#include "host-utils.h" > > //#define PFLASH_DEBUG > #ifdef PFLASH_DEBUG > @@ -575,42 +576,6 @@ static const MemoryRegionOps pflash_cfi02_ops_le = { > .endianness = DEVICE_NATIVE_ENDIAN, > }; > > -/* Count trailing zeroes of a 32 bits quantity */ > -static int ctz32 (uint32_t n) > -{ > - int ret; > - > - ret = 0; > - if (!(n & 0xFFFF)) { > - ret += 16; > - n = n >> 16; > - } > - if (!(n & 0xFF)) { > - ret += 8; > - n = n >> 8; > - } > - if (!(n & 0xF)) { > - ret += 4; > - n = n >> 4; > - } > - if (!(n & 0x3)) { > - ret += 2; > - n = n >> 2; > - } > - if (!(n & 0x1)) { > - ret++; > -#if 0 /* This is not necessary as n is never 0 */ > - n = n >> 1; > -#endif > - } > -#if 0 /* This is not necessary as n is never 0 */ > - if (!n) > - ret++; > -#endif > - > - return ret; > -} > - > pflash_t *pflash_cfi02_register(target_phys_addr_t base, > DeviceState *qdev, const char *name, > target_phys_addr_t size, Thanks, applied. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net