Re: [Qemu-devel] [PATCH 7/7] tcg: Streamline movcond_i64 using movcond_i32

[Aurelien Jarno <aurelien@aurel32.net>]

On Fri, Sep 21, 2012 at 03:27:52PM -0700, Richard Henderson wrote:
> On 09/21/2012 02:23 PM, Aurelien Jarno wrote:
> > Now I wonder if it wouldn't be better to write brcond2 as setcond2 +
> > brcond. And even setcond2 as a pair of setcond in TCG, which would allow
> > some optimizations in case both high parts are zero.
> 
> I think brcond2 vs setcond2 is a choice that has to be made on a
> host-by-host basis.  E.g. for i386 we implement setcond2 with branches.
> E.g. for hppa setcond2, while not using branches, is twice the size of
> brcond2.  But there's nothing saying you couldn't have the mips
> version of brcond2 use setcond2 internals to do its job.

Yes and now. Currently the MIPS version of setcond2, uses 2 temporary
registers and the return argument. This is therefore not possible to
make brcond2 to use setcond2. 

I have just seen it's possible to reorder the instructions to use two 
temporaries only, but you see the problem there. Doing that as the TCG
level means you can use more temporaries, at the backend level means you
have to play with the registers you have.

> On the other hand, having tcg/optimize.c reduce both setcond2 and brcond2
> to setcond and brcond with the appropriate values of zero would be a most
> welcome improvement.

That's a good idea.

> Also, I've been thinking about having a tcg.h function that produces the
> cond-without-equality table that I introduced to fix hppa recently.  Using
> that could reduce code size in some of the other backends as well.
> 

I am using such a table in the MIPS backend, but done with a big switch.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net