From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58013) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TFVkE-0004jK-HS for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TFVkC-0002WP-CX for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:06 -0400 Received: from hall.aurel32.net ([88.191.126.93]:41464) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TFVkC-0002WH-5p for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:04 -0400 Date: Sat, 22 Sep 2012 21:51:59 +0200 From: Aurelien Jarno Message-ID: <20120922195159.GA32184@ohm.aurel32.net> References: <1348273096-1495-1-git-send-email-rth@twiddle.net> <1348273096-1495-2-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1348273096-1495-2-git-send-email-rth@twiddle.net> Subject: Re: [Qemu-devel] [PATCH 1/8] tcg: Adjust descriptions of *cond opcodes List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Fri, Sep 21, 2012 at 05:18:09PM -0700, Richard Henderson wrote: > The README file documented the operand ordering of the tcg_gen_* > functions. Since we're documenting opcodes here, use the true > operand ordering. > > Signed-off-by: Richard Henderson > Cc: malc > --- > tcg/README | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/tcg/README b/tcg/README > index d03ae05..cd9d9cc 100644 > --- a/tcg/README > +++ b/tcg/README > @@ -141,7 +141,7 @@ Define label 'label' at the current program point. > > Jump to label. > > -* brcond_i32/i64 cond, t0, t1, label > +* brcond_i32/i64 t0, t1, cond, label > > Conditional jump if t0 cond t1 is true. cond can be: > TCG_COND_EQ > @@ -301,13 +301,13 @@ This operation would be equivalent to > > ********* Conditional moves > > -* setcond_i32/i64 cond, dest, t1, t2 > +* setcond_i32/i64 dest, t1, t2, cond > > dest = (t1 cond t2) > > Set DEST to 1 if (T1 cond T2) is true, otherwise set to 0. > > -* movcond_i32/i64 cond, dest, c1, c2, v1, v2 > +* movcond_i32/i64 dest, c1, c2, v1, v2, cond > > dest = (c1 cond c2 ? v1 : v2) > > @@ -360,7 +360,7 @@ The following opcodes are internal to TCG. Thus they are to be implemented by > 32-bit host code generators, but are not to be emitted by guest translators. > They are emitted as needed by inline functions within "tcg-op.h". > > -* brcond2_i32 cond, t0_low, t0_high, t1_low, t1_high, label > +* brcond2_i32 t0_low, t0_high, t1_low, t1_high, cond, label > > Similar to brcond, except that the 64-bit values T0 and T1 > are formed from two 32-bit arguments. > @@ -377,7 +377,7 @@ is returned in two 32-bit outputs. > Similar to mul, except two 32-bit (unsigned) inputs T1 and T2 yielding > the full 64-bit product T0. The later is returned in two 32-bit outputs. > > -* setcond2_i32 cond, dest, t1_low, t1_high, t2_low, t2_high > +* setcond2_i32 dest, t1_low, t1_high, t2_low, t2_high, cond > > Similar to setcond, except that the 64-bit values T1 and T2 are > formed from two 32-bit arguments. The result is a 32-bit value. Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net