From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TFVkD-0004jJ-R8 for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TFVkC-0002WX-IV for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:05 -0400 Received: from hall.aurel32.net ([88.191.126.93]:41466) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TFVkC-0002WI-5u for qemu-devel@nongnu.org; Sat, 22 Sep 2012 15:52:04 -0400 Date: Sat, 22 Sep 2012 21:52:01 +0200 From: Aurelien Jarno Message-ID: <20120922195201.GA32239@ohm.aurel32.net> References: <1348273096-1495-1-git-send-email-rth@twiddle.net> <1348273096-1495-3-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1348273096-1495-3-git-send-email-rth@twiddle.net> Subject: Re: [Qemu-devel] [PATCH 2/8] tcg: Emit ANDI as EXTU for appropriate constants List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Fri, Sep 21, 2012 at 05:18:10PM -0700, Richard Henderson wrote: > Note that andi_i64 failed to perform even the minimal > optimizations promised by the README. > > Signed-off-by: Richard Henderson > --- > tcg/tcg-op.h | 67 ++++++++++++++++++++++++++++++++++++++++++++++++++---------- > 1 file changed, 56 insertions(+), 11 deletions(-) > > diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h > index 6d28f82..c8633ff 100644 > --- a/tcg/tcg-op.h > +++ b/tcg/tcg-op.h > @@ -518,18 +518,34 @@ static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) > } > } > > -static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2) > +static inline void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2) > { > - /* some cases can be optimized here */ > - if (arg2 == 0) { > + TCGv_i32 t0; > + /* Some cases can be optimized here. */ > + switch (arg2) { > + case 0: > tcg_gen_movi_i32(ret, 0); > - } else if (arg2 == 0xffffffff) { > + return; > + case 0xffffffffu: > tcg_gen_mov_i32(ret, arg1); > - } else { > - TCGv_i32 t0 = tcg_const_i32(arg2); > - tcg_gen_and_i32(ret, arg1, t0); > - tcg_temp_free_i32(t0); > - } > + return; > + case 0xffu: > + /* Don't recurse with tcg_gen_ext8u_i32. */ > + if (TCG_TARGET_HAS_ext8u_i32) { > + tcg_gen_op2_i32(INDEX_op_ext8u_i32, ret, arg1); > + return; > + } > + break; > + case 0xffffu: > + if (TCG_TARGET_HAS_ext16u_i32) { > + tcg_gen_op2_i32(INDEX_op_ext16u_i32, ret, arg1); > + return; > + } > + break; > + } > + t0 = tcg_const_i32(arg2); > + tcg_gen_and_i32(ret, arg1, t0); > + tcg_temp_free_i32(t0); > } > > static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) > @@ -1120,9 +1136,38 @@ static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) > } > } > > -static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2) > +static inline void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2) > { > - TCGv_i64 t0 = tcg_const_i64(arg2); > + TCGv_i64 t0; > + /* Some cases can be optimized here. */ > + switch (arg2) { > + case 0: > + tcg_gen_movi_i64(ret, 0); > + return; > + case 0xffffffffffffffffull: > + tcg_gen_mov_i64(ret, arg1); > + return; > + case 0xffull: > + /* Don't recurse with tcg_gen_ext8u_i32. */ > + if (TCG_TARGET_HAS_ext8u_i64) { > + tcg_gen_op2_i64(INDEX_op_ext8u_i64, ret, arg1); > + return; > + } > + break; > + case 0xffffu: > + if (TCG_TARGET_HAS_ext16u_i64) { > + tcg_gen_op2_i64(INDEX_op_ext16u_i64, ret, arg1); > + return; > + } > + break; > + case 0xffffffffull: > + if (TCG_TARGET_HAS_ext32u_i64) { > + tcg_gen_op2_i64(INDEX_op_ext32u_i64, ret, arg1); > + return; > + } > + break; > + } > + t0 = tcg_const_i64(arg2); > tcg_gen_and_i64(ret, arg1, t0); > tcg_temp_free_i64(t0); > } > -- > 1.7.11.4 > > Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net