* [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32
@ 2012-09-28 15:17 Peter Maydell
2012-09-28 15:42 ` Peter Maydell
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Peter Maydell @ 2012-09-28 15:17 UTC (permalink / raw)
To: qemu-devel; +Cc: patches, Alexander Graf, Aurelien Jarno, Richard Henderson
The uint64_to_float32() conversion function was incorrectly always
returning numbers with the sign bit set (ie negative numbers). Correct
this so we return positive numbers instead.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
As far as I can see we use this function only in the three PPC SPE
insns efscfuf, efsctsf, efsctuf. It is therefore untested(!); if
anybody with PPC hw to test against could check the results of
those functions that would be cool.
fpu/softfloat.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index b29256a..91497e8 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1238,7 +1238,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
if ( a == 0 ) return float32_zero;
shiftCount = countLeadingZeros64( a ) - 40;
if ( 0 <= shiftCount ) {
- return packFloat32( 1 > 0, 0x95 - shiftCount, a<<shiftCount );
+ return packFloat32(0, 0x95 - shiftCount, a<<shiftCount);
}
else {
shiftCount += 7;
@@ -1248,7 +1248,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
else {
a <<= shiftCount;
}
- return roundAndPackFloat32( 1 > 0, 0x9C - shiftCount, a STATUS_VAR );
+ return roundAndPackFloat32(0, 0x9C - shiftCount, a STATUS_VAR);
}
}
--
1.7.9.5
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32
2012-09-28 15:17 [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32 Peter Maydell
@ 2012-09-28 15:42 ` Peter Maydell
2012-10-01 16:59 ` Aurelien Jarno
2012-10-01 16:56 ` Aurelien Jarno
2012-10-01 20:12 ` Aurelien Jarno
2 siblings, 1 reply; 5+ messages in thread
From: Peter Maydell @ 2012-09-28 15:42 UTC (permalink / raw)
To: qemu-devel; +Cc: Richard Henderson, Alexander Graf, Aurelien Jarno, patches
On 28 September 2012 16:17, Peter Maydell <peter.maydell@linaro.org> wrote:
> The uint64_to_float32() conversion function was incorrectly always
> returning numbers with the sign bit set (ie negative numbers). Correct
> this so we return positive numbers instead.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> As far as I can see we use this function only in the three PPC SPE
> insns efscfuf, efsctsf, efsctuf. It is therefore untested(!); if
> anybody with PPC hw to test against could check the results of
> those functions that would be cool.
...incidentally in two of those uses we're operating on a constant:
tmp = uint64_to_float64(1ULL << 32, &env->vec_status);
and it would probably be better to use make_float64() instead.
-- PMM
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32
2012-09-28 15:42 ` Peter Maydell
@ 2012-10-01 16:59 ` Aurelien Jarno
0 siblings, 0 replies; 5+ messages in thread
From: Aurelien Jarno @ 2012-10-01 16:59 UTC (permalink / raw)
To: Peter Maydell; +Cc: Alexander Graf, Richard Henderson, qemu-devel, patches
On Fri, Sep 28, 2012 at 04:42:16PM +0100, Peter Maydell wrote:
> On 28 September 2012 16:17, Peter Maydell <peter.maydell@linaro.org> wrote:
> > The uint64_to_float32() conversion function was incorrectly always
> > returning numbers with the sign bit set (ie negative numbers). Correct
> > this so we return positive numbers instead.
> >
> > Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> > ---
> > As far as I can see we use this function only in the three PPC SPE
> > insns efscfuf, efsctsf, efsctuf. It is therefore untested(!); if
> > anybody with PPC hw to test against could check the results of
> > those functions that would be cool.
SPE instructions are not common on the non-embedded world, as far as I
know it should be tested using the e500 CPU. That said I don't have a
kernel nor an image for such a machine.
> ...incidentally in two of those uses we're operating on a constant:
> tmp = uint64_to_float64(1ULL << 32, &env->vec_status);
> and it would probably be better to use make_float64() instead.
>
Agreed.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32
2012-09-28 15:17 [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32 Peter Maydell
2012-09-28 15:42 ` Peter Maydell
@ 2012-10-01 16:56 ` Aurelien Jarno
2012-10-01 20:12 ` Aurelien Jarno
2 siblings, 0 replies; 5+ messages in thread
From: Aurelien Jarno @ 2012-10-01 16:56 UTC (permalink / raw)
To: Peter Maydell; +Cc: Richard Henderson, qemu-devel, patches, Alexander Graf
On Fri, Sep 28, 2012 at 04:17:03PM +0100, Peter Maydell wrote:
> The uint64_to_float32() conversion function was incorrectly always
> returning numbers with the sign bit set (ie negative numbers). Correct
> this so we return positive numbers instead.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> As far as I can see we use this function only in the three PPC SPE
> insns efscfuf, efsctsf, efsctuf. It is therefore untested(!); if
> anybody with PPC hw to test against could check the results of
> those functions that would be cool.
>
> fpu/softfloat.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index b29256a..91497e8 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1238,7 +1238,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
> if ( a == 0 ) return float32_zero;
> shiftCount = countLeadingZeros64( a ) - 40;
> if ( 0 <= shiftCount ) {
> - return packFloat32( 1 > 0, 0x95 - shiftCount, a<<shiftCount );
> + return packFloat32(0, 0x95 - shiftCount, a<<shiftCount);
> }
> else {
> shiftCount += 7;
> @@ -1248,7 +1248,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
> else {
> a <<= shiftCount;
> }
> - return roundAndPackFloat32( 1 > 0, 0x9C - shiftCount, a STATUS_VAR );
> + return roundAndPackFloat32(0, 0x9C - shiftCount, a STATUS_VAR);
> }
> }
>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32
2012-09-28 15:17 [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32 Peter Maydell
2012-09-28 15:42 ` Peter Maydell
2012-10-01 16:56 ` Aurelien Jarno
@ 2012-10-01 20:12 ` Aurelien Jarno
2 siblings, 0 replies; 5+ messages in thread
From: Aurelien Jarno @ 2012-10-01 20:12 UTC (permalink / raw)
To: Peter Maydell; +Cc: Alexander Graf, Richard Henderson, qemu-devel, patches
On Fri, Sep 28, 2012 at 04:17:03PM +0100, Peter Maydell wrote:
> The uint64_to_float32() conversion function was incorrectly always
> returning numbers with the sign bit set (ie negative numbers). Correct
> this so we return positive numbers instead.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> As far as I can see we use this function only in the three PPC SPE
> insns efscfuf, efsctsf, efsctuf. It is therefore untested(!); if
> anybody with PPC hw to test against could check the results of
> those functions that would be cool.
>
> fpu/softfloat.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index b29256a..91497e8 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -1238,7 +1238,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
> if ( a == 0 ) return float32_zero;
> shiftCount = countLeadingZeros64( a ) - 40;
> if ( 0 <= shiftCount ) {
> - return packFloat32( 1 > 0, 0x95 - shiftCount, a<<shiftCount );
> + return packFloat32(0, 0x95 - shiftCount, a<<shiftCount);
> }
> else {
> shiftCount += 7;
> @@ -1248,7 +1248,7 @@ float32 uint64_to_float32( uint64 a STATUS_PARAM )
> else {
> a <<= shiftCount;
> }
> - return roundAndPackFloat32( 1 > 0, 0x9C - shiftCount, a STATUS_VAR );
> + return roundAndPackFloat32(0, 0x9C - shiftCount, a STATUS_VAR);
> }
> }
>
Thanks, applied.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 5+ messages in thread
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2012-09-28 15:17 [Qemu-devel] [PATCH] fpu/softfloat.c: Return correctly signed values from uint64_to_float32 Peter Maydell
2012-09-28 15:42 ` Peter Maydell
2012-10-01 16:59 ` Aurelien Jarno
2012-10-01 16:56 ` Aurelien Jarno
2012-10-01 20:12 ` Aurelien Jarno
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