From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36884) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKBJr-0005OR-Nr for qemu-devel@nongnu.org; Fri, 05 Oct 2012 13:04:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TKBJq-0004Hm-Ax for qemu-devel@nongnu.org; Fri, 05 Oct 2012 13:04:11 -0400 Received: from hall.aurel32.net ([88.191.126.93]:52438) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKBJq-0004GZ-54 for qemu-devel@nongnu.org; Fri, 05 Oct 2012 13:04:10 -0400 Date: Fri, 5 Oct 2012 19:03:51 +0200 From: Aurelien Jarno Message-ID: <20121005170351.GA23690@ohm.aurel32.net> References: <1348034655-2946-1-git-send-email-rth@twiddle.net> <506EEC91.1020606@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <506EEC91.1020606@twiddle.net> Subject: Re: [Qemu-devel] [PATCH v2] target-mips: Use TCG registers for the FPU. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: qemu-devel@nongnu.org On Fri, Oct 05, 2012 at 07:20:01AM -0700, Richard Henderson wrote: > Ping. You gave it your Reviewed-by. > > r~ Yes, but I also said that with the current TCG status, it actually reduces the speed of the emulation instead of increasing it. I am not sure we really want that, even if the generated code is better. We have to get rid of the loops on all TCG temps first, which is exactly what the patch series I sent last week does. I have to send a new version, but the week has been a bit crazy here and I haven't found time to finish polishing it, nor reviewing the patches sent on the mailing list. Let's hope the week-end will be better for that. > On 09/18/2012 11:04 PM, Richard Henderson wrote: > > With normal FP, this doesn't have much affect on the generated code, > > because most of the FP operations are not CONST/PURE, and so we spill > > registers in about the same frequency as the explicit load/stores. > > > > But with Loongson multimedia instructions, which are all integral and > > whose helpers are in fact CONST+PURE, this greatly improves the code. > > > > Signed-off-by: Richard Henderson > > --- > > > > As requested, only generating 64-bit fp registers now. The generated > > code looks quite good on i386. It could be a tad better for x86_64, > > but it's still better than it was. > > > > > > r~ > > > > > > target-mips/translate.c | 96 +++++++++++++++++++++++++++---------------------- > > 1 file changed, 54 insertions(+), 42 deletions(-) > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net