From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:44914) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TKZE1-00023Z-I4 for qemu-devel@nongnu.org; Sat, 06 Oct 2012 14:35:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TKZDz-0006ts-0p for qemu-devel@nongnu.org; Sat, 06 Oct 2012 14:35:45 -0400 Date: Sat, 6 Oct 2012 20:35:39 +0200 From: Aurelien Jarno Message-ID: <20121006183539.GA31342@ohm.aurel32.net> References: <1349359016-13107-1-git-send-email-agraf@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1349359016-13107-1-git-send-email-agraf@suse.de> Subject: Re: [Qemu-devel] [PULL 00/34] ppc patch queue 2012-10-04 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Blue Swirl , "qemu-ppc@nongnu.org List" , qemu-devel qemu-devel On Thu, Oct 04, 2012 at 03:56:22PM +0200, Alexander Graf wrote: > Hi Blue / Aurelien, > > This is my current patch queue for ppc. Please pull. > > Alex > > The following changes since commit e744c06fca438dc08271e626034e632a270c91c8: > Peter Maydell (1): > fpu/softfloat.c: Return correctly signed values from uint64_to_float32 > > are available in the git repository at: > > git://repo.or.cz/qemu/agraf.git ppc-for-upstream > > Alexander Graf (2): > fdt: move dumpdtb interpretation code to device_tree.c > device tree: simplify dumpdtb code > > Andreas Färber (5): > MAINTAINERS: Document sPAPR (pSeries) machine > MAINTAINERS: Document e500 machines and devices > MAINTAINERS: Downgrade ppc405 to Odd Fixes > MAINTAINERS: Document Bamboo machine and ppc4xx devices > MAINTAINERS: Document virtex_ml507 machine > > Aurelien Jarno (4): > target-ppc: simplify NaN propagation for vector functions > target-ppc: use the softfloat min/max functions > target-ppc: use the softfloat float32_muladd function > target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros > > David Gibson (20): > ppc: Make kvm_arch_put_registers() put *all* the registers > pseries: Fix and cleanup CPU initialization and reset > pseries: Use new method to correct reset sequence > pseries: Add support for new KVM hash table control call > pseries: Clear TCE and signal state when resetting PAPR VIO devices > pseries: Reset emulated PCI TCE tables on system reset > pseries: Fix XICS reset > pseries: Small cleanup to H_CEDE implementation > pseries: Remove C bitfields from xics code > pseries: Remove XICS irq type enum type > pseries: Remove never used flags field from spapr vio devices > pseries: Rework implementation of TCE bypass > pseries: Fix semantics of RTAS int-on, int-off and set-xive functions > target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab() > pseries: Remove unnecessary locking from PAPR hash table hcalls > pseries: Set hash table size based on RAM size > target-ppc: Remove unused power_mode field from cpu state > target-ppc: Extend FPU state for newer POWER CPUs > pseries: Don't test for MSR_PR for hypercalls under KVM > ppc/pseries: Reset VPA registration on CPU reset > > Scott Wood (2): > PPC: e500: increase DTC_LOAD_PAD > PPC: e500: calculate initrd_base like dt_base > > Stefan Weil (1): > ppc405_uc: Fix buffer overflow > > MAINTAINERS | 50 +++++++- > device_tree.c | 15 ++ > device_tree.h | 2 + > hw/ppc/e500.c | 20 +-- > hw/ppc405_uc.c | 16 ++- > hw/spapr.c | 329 ++++++++++++++++++++++++++----------------- > hw/spapr.h | 14 ++- > hw/spapr_hcall.c | 49 +------ > hw/spapr_iommu.c | 24 +++ > hw/spapr_pci.c | 12 ++- > hw/spapr_rtas.c | 5 + > hw/spapr_vio.c | 37 ++--- > hw/spapr_vio.h | 2 - > hw/xics.c | 114 ++++++++------- > hw/xics.h | 8 +- > target-ppc/cpu.h | 5 +- > target-ppc/int_helper.c | 127 +++-------------- > target-ppc/kvm.c | 138 +++++++++++++----- > target-ppc/kvm_ppc.h | 19 +++ > target-ppc/machine.c | 12 +- > target-ppc/translate.c | 2 +- > target-ppc/translate_init.c | 8 + > 22 files changed, 574 insertions(+), 434 deletions(-) > > Thanks, pulled. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net