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From: Aurelien Jarno <aurelien@aurel32.net>
To: Yeongkyoon Lee <yeongkyoon.lee@samsung.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v5 0/3] tcg: enhance code generation quality for qemu_ld/st IRs
Date: Tue, 9 Oct 2012 16:26:10 +0200	[thread overview]
Message-ID: <20121009142610.GA14078@ohm.aurel32.net> (raw)
In-Reply-To: <1349786252-12343-1-git-send-email-yeongkyoon.lee@samsung.com>

On Tue, Oct 09, 2012 at 09:37:29PM +0900, Yeongkyoon Lee wrote:
> Hi, all.
> 
> Here is the 5th version of the series optimizing TCG qemu_ld/st code generation.
> 
> v5:
>   - Remove RFC tag
> 
> v4:
>   - Remove CONFIG_SOFTMMU pre-condition from configure
>   - Instead, add some CONFIG_SOFTMMU condition to TCG sources
>   - Remove some unnecessary comments
> 
> v3:
>   - Support CONFIG_TCG_PASS_AREG0
>     (expected to get more performance enhancement than others)
>   - Remove the configure option "--enable-ldst-optimization""
>   - Make the optimization as default on i386 and x86_64 hosts
>   - Fix some mistyping and apply checkpatch.pl before committing
>   - Test i386, arm and sparc softmmu targets on i386 and x86_64 hosts
>   - Test linux-user-test-0.3
> 
> v2:
>   - Follow the submit rule of qemu
> 
> v1:
>   - Initial commit request
> 
> I think the generated codes from qemu_ld/st IRs are relatively heavy, which are
> up to 12 instructions for TLB hit case on i386 host.
> This patch series enhance the code quality of TCG qemu_ld/st IRs by reducing
> jump and enhancing locality.
> Main idea is simple and has been already described in the comments in
> tcg-target.c, which separates slow path (TLB miss case), and generates it at the
> end of TB.
> 
> For example, the generated code from qemu_ld changes as follow.
> Before:
> (1) TLB check
> (2) If hit fall through, else jump to TLB miss case (5)
> (3) TLB hit case: Load value from host memory
> (4) Jump to next code (6)
> (5) TLB miss case: call MMU helper
> (6) ... (next code)
> 
> After:
> (1) TLB check
> (2) If hit fall through, else jump to TLB miss case (7)
> (3) TLB hit case: Load value from host memory
> (4) ... (next code)
> ...
> (7) TLB miss case: call MMU helper
> (8) Return to next code (4)
> 

Instead of calling the MMU helper with an additional argument (7), and
then jump back (8) to the next code (4), what about pushing the address
of the next code (4) on the stack and use a jmp instead of the call. In
that case you don't need the extra argument to the helpers.

Otherwise I haven't looked the code, but on the principle it looks fine
to me.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

  parent reply	other threads:[~2012-10-09 14:27 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-10-09 12:37 [Qemu-devel] [PATCH v5 0/3] tcg: enhance code generation quality for qemu_ld/st IRs Yeongkyoon Lee
2012-10-09 12:37 ` [Qemu-devel] [PATCH v5 1/3] configure: Add CONFIG_QEMU_LDST_OPTIMIZATION for TCG qemu_ld/st optimization Yeongkyoon Lee
2012-10-09 12:37 ` [Qemu-devel] [PATCH v5 2/3] tcg: Add declarations and templates of extended MMU helpers Yeongkyoon Lee
2012-10-09 18:36   ` Richard Henderson
2012-10-10 11:04     ` Yeongkyoon Lee
2012-10-09 12:37 ` [Qemu-devel] [PATCH v5 3/3] tcg: Optimize qemu_ld/st by generating slow paths at the end of a block Yeongkyoon Lee
2012-10-09 18:49   ` Richard Henderson
2012-10-10  4:41     ` Yeongkyoon Lee
2012-10-09 14:26 ` Aurelien Jarno [this message]
2012-10-09 16:19   ` [Qemu-devel] [PATCH v5 0/3] tcg: enhance code generation quality for qemu_ld/st IRs Aurelien Jarno
2012-10-09 16:55     ` Paolo Bonzini
2012-10-09 17:09       ` Aurelien Jarno
2012-10-10  4:17         ` Yeongkyoon Lee
2012-10-10  6:45           ` Aurelien Jarno
2012-10-10 10:34             ` Yeongkyoon Lee
2012-10-10 14:09               ` Yeongkyoon Lee

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