From: "Michael S. Tsirkin" <mst@redhat.com>
To: Jason Baron <jbaron@redhat.com>
Cc: agraf@suse.de, aliguori@us.ibm.com, juzhang@redhat.com,
jan.kiszka@siemens.com, qemu-devel@nongnu.org, armbru@redhat.com,
blauwirbel@gmail.com, yamahata@valinux.co.jp,
alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com,
mkletzan@redhat.com, pbonzini@redhat.com, lcapitulino@redhat.com,
afaerber@suse.de, kraxel@redhat.com
Subject: Re: [Qemu-devel] [PATCH v2 21/21] q35: add acpi-based pci hotplug.
Date: Thu, 11 Oct 2012 16:46:56 +0200 [thread overview]
Message-ID: <20121011144656.GF8983@redhat.com> (raw)
In-Reply-To: <20121011142122.GH3592@redhat.com>
On Thu, Oct 11, 2012 at 10:21:22AM -0400, Jason Baron wrote:
> On Thu, Oct 11, 2012 at 12:57:06PM +0200, Michael S. Tsirkin wrote:
> > On Mon, Oct 08, 2012 at 11:30:39PM -0400, Jason Baron wrote:
> > > From: Jason Baron <jbaron@redhat.com>
> > >
> > > Add piix style acpi hotplug to q35.
> > >
> > > Signed-off-by: Jason Baron <jbaron@redhat.com>
> >
> > Something I don't understand here: this only handles hotplug
> > of devices behind the root, no?
> > Don't we need support for hotplug/hot remove of devices behind
> > bridges?
> >
>
> Yes, this only handles acpi hotplug of devices behind the root. I'm
> trying to reach minimal set of q35 patches that we can build upon. I
> think that this patch gives us at least the same functionality as piix
> does. (Plus there is pcie hotplug).
>
> As you know, I have a proof of concept patch series providing a second
> level of hotplug behind bridges. Unfortunately, it was based on the
> static acpi tables, before Paolo made the hotplug table generation
> dynamic. So it needs quite a bit of re-work. But I know that it should
> work :)
>
> Thanks,
>
> -Jason
Yes. Reason I ask is because q35 is adding bridges by default now.
Would it be possible to only add them if requested on command line by user
instead? I realize some guests expect devices at specific slots
but this does not apply to bridges I think?
It would also be nice to add comments explaining why
specific slots were selected e.g. /* BSD XYZ fails to boot unless ahci is at alow 2 */
etc.
Also - will adding this code now mean that when adding bridges
we'll need to add compatibility code in bios/qemu in the future?
--
MST
next prev parent reply other threads:[~2012-10-11 14:55 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-09 3:30 [Qemu-devel] [PATCH v2 00/21] q35 qemu support Jason Baron
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 01/21] blockdev: Introduce a default machine blockdev interface field, QEMUMachine->mach_if Jason Baron
2012-10-09 7:34 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 02/21] blockdev: Introduce IF_AHCI Jason Baron
2012-10-09 7:36 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 03/21] pci: pci capability must be in PCI space Jason Baron
2012-10-09 7:36 ` Paolo Bonzini
2012-10-13 8:29 ` Blue Swirl
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 04/21] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle Jason Baron
2012-10-09 7:39 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 06/21] pc: Move ioapic_init() from pc_piix.c to pc.c Jason Baron
2012-10-09 7:44 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 05/21] pc, pc_piix: split out pc nic initialization Jason Baron
2012-10-09 7:39 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 07/21] pc/piix_pci: factor out smram/pam logic Jason Baron
2012-10-09 7:47 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 08/21] pci_ids: add intel 82801BA pci-to-pci bridge id and PCI_CLASS_SERIAL_SMBUS Jason Baron
2012-10-09 7:48 ` Paolo Bonzini
2012-10-13 8:31 ` Blue Swirl
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 09/21] pci: Add class 0xc05 as 'SMBus' Jason Baron
2012-10-09 7:49 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 10/21] pcie: pass pcie window size to pcie_host_mmcfg_update() Jason Baron
2012-10-09 7:52 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 11/21] pcie: Convert PCIExpressHost to use the QOM Jason Baron
2012-10-09 7:52 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 12/21] q35: Introduce q35 pc based chipset emulator Jason Baron
2012-10-11 14:47 ` Michael S. Tsirkin
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 13/21] q35: Re-base q35 Jason Baron
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 14/21] q35: Suppress SMM BIOS initialization under KVM Jason Baron
2012-10-09 7:53 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 15/21] q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic Jason Baron
2012-10-09 7:53 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 17/21] q35: Add kvmclock support Jason Baron
2012-10-09 7:54 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 16/21] q35: smbus: Remove PCI_STATUS_SIG_SYSTEM_ERROR and PCI_STATUS_DETECTED_PARITY from w1cmask Jason Baron
2012-10-09 7:54 ` Paolo Bonzini
2012-10-11 14:53 ` Michael S. Tsirkin
2012-10-19 15:13 ` Jason Baron
2012-10-19 16:17 ` Isaku Yamahata
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 19/21] Add a fallback bios file search, if -L fails Jason Baron
2012-10-09 7:59 ` Paolo Bonzini
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 18/21] q35: Fix irr initialization for slots 25..31 Jason Baron
2012-10-09 7:58 ` Paolo Bonzini
2012-10-11 14:49 ` Michael S. Tsirkin
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 20/21] q35: automatically load the q35 dsdt table Jason Baron
2012-10-09 8:02 ` Paolo Bonzini
2012-10-09 8:29 ` Paolo Bonzini
2012-10-09 20:06 ` Jason Baron
2012-10-13 8:33 ` Blue Swirl
2012-10-09 3:30 ` [Qemu-devel] [PATCH v2 21/21] q35: add acpi-based pci hotplug Jason Baron
2012-10-09 8:04 ` Paolo Bonzini
2012-10-11 10:57 ` Michael S. Tsirkin
2012-10-11 14:21 ` Jason Baron
2012-10-11 14:46 ` Michael S. Tsirkin [this message]
2012-10-11 14:54 ` Paolo Bonzini
2012-10-11 15:40 ` Jason Baron
2012-10-11 15:34 ` Jason Baron
2012-10-11 20:40 ` Michael S. Tsirkin
2012-10-12 15:27 ` Jason Baron
2012-10-13 23:03 ` Michael S. Tsirkin
2012-10-12 7:27 ` Gerd Hoffmann
2012-10-12 9:39 ` Michael S. Tsirkin
2012-10-12 10:06 ` Gerd Hoffmann
2012-10-12 10:39 ` Michael S. Tsirkin
2012-10-12 15:00 ` Jason Baron
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20121011144656.GF8983@redhat.com \
--to=mst@redhat.com \
--cc=afaerber@suse.de \
--cc=agraf@suse.de \
--cc=alex.williamson@redhat.com \
--cc=aliguori@us.ibm.com \
--cc=armbru@redhat.com \
--cc=avi@redhat.com \
--cc=blauwirbel@gmail.com \
--cc=jan.kiszka@siemens.com \
--cc=jbaron@redhat.com \
--cc=juzhang@redhat.com \
--cc=kevin@koconnor.net \
--cc=kraxel@redhat.com \
--cc=lcapitulino@redhat.com \
--cc=mkletzan@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=yamahata@valinux.co.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).