From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:35656) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TNu68-0000kb-E2 for qemu-devel@nongnu.org; Mon, 15 Oct 2012 19:29:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TNu67-0001zA-H8 for qemu-devel@nongnu.org; Mon, 15 Oct 2012 19:29:24 -0400 Received: from mx1.redhat.com ([209.132.183.28]:8055) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TNu67-0001z4-7C for qemu-devel@nongnu.org; Mon, 15 Oct 2012 19:29:23 -0400 Date: Tue, 16 Oct 2012 01:29:18 +0200 From: Igor Mammedov Message-ID: <20121016012918.5de8015e@thinkpad.mammed.net> In-Reply-To: <1350005203-15405-4-git-send-email-afaerber@suse.de> References: <1350005203-15405-1-git-send-email-afaerber@suse.de> <1350005203-15405-4-git-send-email-afaerber@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH qom-cpu v2 3/7] target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?UTF-8?B?RsOkcmJlcg==?= Cc: qemu-devel@nongnu.org On Fri, 12 Oct 2012 03:26:39 +0200 Andreas F=C3=A4rber wrote: > Simplifies the call in apic_sipi() again and needed for moving halted > field to CPUState. >=20 > Signed-off-by: Andreas F=C3=A4rber > --- > hw/apic.c | 2 +- > target-i386/cpu.h | 4 +++- > 2 Dateien ge=C3=A4ndert, 4 Zeilen hinzugef=C3=BCgt(+), 2 Zeilen entfernt= (-) >=20 > diff --git a/hw/apic.c b/hw/apic.c > index f1f804d..ccf2819 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -487,7 +487,7 @@ void apic_sipi(DeviceState *d) > =20 > if (!s->wait_for_sipi) > return; > - cpu_x86_load_seg_cache_sipi(&s->cpu->env, s->sipi_vector); > + cpu_x86_load_seg_cache_sipi(s->cpu, s->sipi_vector); > s->wait_for_sipi =3D 0; > } > =20 > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 871c270..e54596f 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -907,9 +907,11 @@ static inline void cpu_x86_load_seg_cache(CPUX86Stat= e *env, > } > } > =20 > -static inline void cpu_x86_load_seg_cache_sipi(CPUX86State *env, > +static inline void cpu_x86_load_seg_cache_sipi(X86CPU *cpu, > int sipi_vector) > { > + CPUX86State *env =3D &cpu->env; > + > env->eip =3D 0; > cpu_x86_load_seg_cache(env, R_CS, sipi_vector << 8, > sipi_vector << 12, > --=20 > 1.7.10.4 >=20 >=20 Reviewed-by: Igor Mammedov --=20 Regards, Igor