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Date: Wed, 17 Oct 2012 01:24:47 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Message-ID: <20121016232447.GH14078@ohm.aurel32.net>
References: <1348685335-16770-1-git-send-email-peter.maydell@linaro.org>
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In-Reply-To: <1348685335-16770-1-git-send-email-peter.maydell@linaro.org>
Subject: Re: [Qemu-devel] [PATCH 0/2] tcg/arm: Implement movcond_i32
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org, patches@linaro.org

On Wed, Sep 26, 2012 at 07:48:53PM +0100, Peter Maydell wrote:
> These patches implement movcond_i32 for the ARM TCG backend; we
> emit "mov dst, v2; cmp c1, c2; movcc dst, v1". We could have
> done this with a pair of conditional movs, but (a) this is not
> actually any shorter (b) it means we don't get the common TCG
> code doing the work of avoiding "mov reg to itself" (c) conditional
> moves aren't quite as free as they used to be on the ARM7.
> 
> (Tested using Aurelien's movcond-shift patches on the ARM frontend
> as something that will generate enough movconds.)
> 
> Peter Maydell (2):
>   tcg/arm: Factor out code to emit immediate or reg-reg op
>   tcg/arm: Implement movcond_i32
> 
>  tcg/arm/tcg-target.c |   56 +++++++++++++++++++++++++++-----------------------
>  tcg/arm/tcg-target.h |    2 +-
>  2 files changed, 31 insertions(+), 27 deletions(-)
> 
> -- 
> 1.7.9.5
> 

Thanks, both applied.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net