From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:48421) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TONhE-0002r9-SV for qemu-devel@nongnu.org; Wed, 17 Oct 2012 03:05:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TONh8-0001D1-QU for qemu-devel@nongnu.org; Wed, 17 Oct 2012 03:05:40 -0400 Received: from hall.aurel32.net ([88.191.126.93]:54287) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TONh8-0001Cg-KD for qemu-devel@nongnu.org; Wed, 17 Oct 2012 03:05:34 -0400 Date: Wed, 17 Oct 2012 09:05:20 +0200 From: Aurelien Jarno Message-ID: <20121017070520.GO9643@ohm.aurel32.net> References: <1349996197-11054-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1349996197-11054-1-git-send-email-afaerber@suse.de> Subject: Re: [Qemu-devel] [PATCH v2 0/5] target-mips: Preparations for CPUState part 4b series List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?iso-8859-15?Q?F=E4rber?= Cc: Richard Henderson , Eric Johnson , qemu-devel@nongnu.org, Jia Liu On Fri, Oct 12, 2012 at 12:56:32AM +0200, Andreas Färber wrote: > Hello Aurélien, > > This series picks up some preparatory patches for QOM CPUState refactoring, > originally posted in May. They still applied cleanly, but I optimized them > a bit and expanded the explanations. > > In short it is about MIPSCPU vs. CPUMIPSState; more fields will be moved > from CPU_COMMON macro to CPUState struct, and to access CPUState we need > a MIPSCPU. Thus MIPSCPU is preferable for arguments of static helpers > (not TCG helpers) because we save some redundant accessor/cast macros. > > Can you please ack/apply and keep in mind for the current patch review? > > Available for testing from: > git://github.com/afaerber/qemu-cpu.git qom-cpu-mips > https://github.com/afaerber/qemu-cpu/commits/qom-cpu-mips > > Regards, > Andreas > > Cc: Aurélien Jarno > > Cc: Jia Liu > Cc: Eric Johnson > Cc: Richard Henderson > > v1 -> v2: > * Cherry-picked from my CPUState part 4 series > * Avoided calling mips_env_get_cpu() in both if branches of helper_m[t]tc0_tchalt() > * Prepended patch to clean up resulting variable naming mess > * Placed variable declarations in the closest block (requested by Alex elsewhere) > > Andreas Färber (5): > target-mips: Clean up other_cpu in helper_{d,e}vpe() > target-mips: Pass MIPSCPU to mips_tc_wake() > target-mips: Pass MIPSCPU to mips_vpe_is_wfi() > target-mips: Pass MIPSCPU to mips_tc_sleep() > target-mips: Pass MIPSCPU to mips_vpe_sleep() > > target-mips/op_helper.c | 63 +++++++++++++++++++++++++++++------------------ > 1 Datei geändert, 39 Zeilen hinzugefügt(+), 24 Zeilen entfernt(-) > > -- > 1.7.10.4 Thanks, all applied. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net