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Date: Fri, 19 Oct 2012 14:18:18 +0200
From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Message-ID: <20121019121817.GC16244@zapo>
References: <cover.1350619775.git.peter.crosthwaite@xilinx.com>
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Subject: Re: [Qemu-devel] [PATCH v1 7/7] nand: Reset addressing after
	READSTATUS.
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To: Peter Maydell <peter.maydell@linaro.org>
Cc: Peter Crosthwaite <peter.crosthwaite@xilinx.com>, john.williams@xilinx.com, qemu-devel@nongnu.org

On Fri, Oct 19, 2012 at 12:59:49PM +0100, Peter Maydell wrote:
> On 19 October 2012 07:40, Peter Crosthwaite
> <peter.crosthwaite@xilinx.com> wrote:
> > From: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> >
> > Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> > ---
> >
> >  hw/nand.c |    6 ++++++
> >  1 files changed, 6 insertions(+), 0 deletions(-)
> >
> > diff --git a/hw/nand.c b/hw/nand.c
> > index 01f3ada..f931d0c 100644
> > --- a/hw/nand.c
> > +++ b/hw/nand.c
> > @@ -478,6 +478,12 @@ void nand_setio(DeviceState *dev, uint32_t value)
> >      int i;
> >      NANDFlashState *s = (NANDFlashState *) dev;
> >      if (!s->ce && s->cle) {
> > +        if (s->cmd == NAND_CMD_READSTATUS) {
> > +            s->addr = 0;
> > +            s->addrlen = 0;
> > +            s->iolen = 0;
> > +        }
> > +
> 
> I find the NAND chip datasheets remarkably hard to interpret, but
> I'm not convinced this patch is the right thing. Can you provide
> some rationale/justification, please? (ideally with reference to
> datasheets...)

This is patch is quite old (several years). At the time modern linux kernels
stopped working with our nand model in some cases. Some patch to our
nand model broke something. I recall trying to make some sense out of
it and this was the closest I got..

I don't know what the state it is today nor do I remember the exact
circumstances on which the bug was trigged. Maybe Peter C has more
info?

Cheers,
Edgar