From: Aurelien Jarno <aurelien@aurel32.net>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org, patches@linaro.org
Subject: Re: [Qemu-devel] [PATCH v2 2/2] target-arm: Implement abs_i32 inline rather than as a helper
Date: Sat, 20 Oct 2012 00:05:34 +0200 [thread overview]
Message-ID: <20121019220534.GC5261@ohm.aurel32.net> (raw)
In-Reply-To: <1350652019-25946-3-git-send-email-peter.maydell@linaro.org>
On Fri, Oct 19, 2012 at 02:06:59PM +0100, Peter Maydell wrote:
> Implement abs_i32 inline (with movcond) rather than using a helper
> function.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> target-arm/helper.c | 5 -----
> target-arm/helper.h | 1 -
> target-arm/translate.c | 11 +++++++++--
> 3 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 58340bd..0601760 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -1562,11 +1562,6 @@ uint32_t HELPER(rbit)(uint32_t x)
> return x;
> }
>
> -uint32_t HELPER(abs)(uint32_t x)
> -{
> - return ((int32_t)x < 0) ? -x : x;
> -}
> -
> #if defined(CONFIG_USER_ONLY)
>
> void do_interrupt (CPUARMState *env)
> diff --git a/target-arm/helper.h b/target-arm/helper.h
> index fa3472f..60812de 100644
> --- a/target-arm/helper.h
> +++ b/target-arm/helper.h
> @@ -13,7 +13,6 @@ DEF_HELPER_2(double_saturate, i32, env, s32)
> DEF_HELPER_FLAGS_2(sdiv, TCG_CALL_CONST | TCG_CALL_PURE, s32, s32, s32)
> DEF_HELPER_FLAGS_2(udiv, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32, i32)
> DEF_HELPER_FLAGS_1(rbit, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
> -DEF_HELPER_FLAGS_1(abs, TCG_CALL_CONST | TCG_CALL_PURE, i32, i32)
>
> #define PAS_OP(pfx) \
> DEF_HELPER_3(pfx ## add8, i32, i32, i32, ptr) \
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index d33f94c..25433da 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -462,8 +462,15 @@ static void gen_sar(TCGv dest, TCGv t0, TCGv t1)
> tcg_temp_free_i32(tmp1);
> }
>
> -/* FIXME: Implement this natively. */
> -#define tcg_gen_abs_i32(t0, t1) gen_helper_abs(t0, t1)
> +static void tcg_gen_abs_i32(TCGv dest, TCGv src)
> +{
> + TCGv c0 = tcg_const_i32(0);
> + TCGv tmp = tcg_temp_new_i32();
> + tcg_gen_neg_i32(tmp, src);
> + tcg_gen_movcond_i32(TCG_COND_GT, dest, src, c0, src, tmp);
> + tcg_temp_free_i32(c0);
> + tcg_temp_free_i32(tmp);
> +}
>
> static void shifter_out_im(TCGv var, int shift)
> {
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
next prev parent reply other threads:[~2012-10-19 22:05 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-19 13:06 [Qemu-devel] [PATCH v2 0/2] target-arm: inline abs, 64-bit negate Peter Maydell
2012-10-19 13:06 ` [Qemu-devel] [PATCH v2 1/2] target-arm: Use TCG operation for Neon 64 bit negation Peter Maydell
2012-10-19 22:05 ` Aurelien Jarno
2012-10-19 13:06 ` [Qemu-devel] [PATCH v2 2/2] target-arm: Implement abs_i32 inline rather than as a helper Peter Maydell
2012-10-19 22:05 ` Aurelien Jarno [this message]
2012-10-19 22:05 ` [Qemu-devel] [PATCH v2 0/2] target-arm: inline abs, 64-bit negate Aurelien Jarno
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