From: "Michael S. Tsirkin" <mst@redhat.com>
To: Jason Baron <jbaron@redhat.com>
Cc: agraf@suse.de, aliguori@us.ibm.com, juzhang@redhat.com,
jan.kiszka@siemens.com, qemu-devel@nongnu.org, armbru@redhat.com,
blauwirbel@gmail.com, yamahata@valinux.co.jp,
alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com,
mkletzan@redhat.com, pbonzini@redhat.com, lcapitulino@redhat.com,
afaerber@suse.de, kraxel@redhat.com
Subject: Re: [Qemu-devel] [PATCH v3 14/26] ich9: Add smbus
Date: Mon, 22 Oct 2012 13:13:03 +0200 [thread overview]
Message-ID: <20121022111303.GD30844@redhat.com> (raw)
In-Reply-To: <1726a5c947cc7b2eaf69e52fea25649cacc8807e.1350677361.git.jbaron@redhat.com>
On Fri, Oct 19, 2012 at 04:43:35PM -0400, Jason Baron wrote:
> From: Jason Baron <jbaron@redhat.com>
>
> Add support for the ich9 smbus chip.
>
> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
> Signed-off-by: Jason Baron <jbaron@redhat.com>
Applied, thanks.
> ---
> hw/i386/Makefile.objs | 2 +-
> hw/smbus_ich9.c | 159 +++++++++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 160 insertions(+), 1 deletions(-)
> create mode 100644 hw/smbus_ich9.c
>
> diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
> index caf8982..693bd18 100644
> --- a/hw/i386/Makefile.objs
> +++ b/hw/i386/Makefile.objs
> @@ -7,7 +7,7 @@ obj-y += debugcon.o multiboot.o
> obj-y += pc_piix.o
> obj-y += pc_sysfw.o
> obj-y += pam.o
> -obj-y += acpi_ich9.o lpc_ich9.o
> +obj-y += acpi_ich9.o lpc_ich9.o smbus_ich9.o
> obj-$(CONFIG_XEN) += xen_platform.o xen_apic.o
> obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen-host-pci-device.o
> obj-$(CONFIG_XEN_PCI_PASSTHROUGH) += xen_pt.o xen_pt_config_init.o xen_pt_msi.o
> diff --git a/hw/smbus_ich9.c b/hw/smbus_ich9.c
> new file mode 100644
> index 0000000..8c2cd44
> --- /dev/null
> +++ b/hw/smbus_ich9.c
> @@ -0,0 +1,159 @@
> +/*
> + * ACPI implementation
> + *
> + * Copyright (c) 2006 Fabrice Bellard
> + *
> + * This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU Lesser General Public
> + * License version 2 as published by the Free Software Foundation.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> + * Lesser General Public License for more details.
> + *
> + * You should have received a copy of the GNU Lesser General Public
> + * License along with this library; if not, see <http://www.gnu.org/licenses/>
> + */
> +/*
> + * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
> + * VA Linux Systems Japan K.K.
> + * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
> + *
> + * This is based on acpi.c, but heavily rewritten.
> + */
> +#include "hw.h"
> +#include "pc.h"
> +#include "pm_smbus.h"
> +#include "pci.h"
> +#include "sysemu.h"
> +#include "i2c.h"
> +#include "smbus.h"
> +
> +#include "ich9.h"
> +
> +#define TYPE_ICH9_SMB_DEVICE "ICH9 SMB"
> +#define ICH9_SMB_DEVICE(obj) \
> + OBJECT_CHECK(ICH9SMBState, (obj), TYPE_ICH9_SMB_DEVICE)
> +
> +typedef struct ICH9SMBState {
> + PCIDevice dev;
> +
> + PMSMBus smb;
> + MemoryRegion mem_bar;
> +} ICH9SMBState;
> +
> +static const VMStateDescription vmstate_ich9_smbus = {
> + .name = "ich9_smb",
> + .version_id = 1,
> + .minimum_version_id = 1,
> + .minimum_version_id_old = 1,
> + .fields = (VMStateField[]) {
> + VMSTATE_PCI_DEVICE(dev, struct ICH9SMBState),
> + VMSTATE_END_OF_LIST()
> + }
> +};
> +
> +static void ich9_smb_ioport_writeb(void *opaque, target_phys_addr_t addr,
> + uint64_t val, unsigned size)
> +{
> + ICH9SMBState *s = opaque;
> + uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
> +
> + if ((hostc & ICH9_SMB_HOSTC_HST_EN) && !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
> + uint64_t offset = addr - s->dev.io_regions[ICH9_SMB_SMB_BASE_BAR].addr;
> + smb_ioport_writeb(&s->smb, offset, val);
> + }
> +}
> +
> +static uint64_t ich9_smb_ioport_readb(void *opaque, target_phys_addr_t addr,
> + unsigned size)
> +{
> + ICH9SMBState *s = opaque;
> + uint8_t hostc = s->dev.config[ICH9_SMB_HOSTC];
> +
> + if ((hostc & ICH9_SMB_HOSTC_HST_EN) && !(hostc & ICH9_SMB_HOSTC_I2C_EN)) {
> + uint64_t offset = addr - s->dev.io_regions[ICH9_SMB_SMB_BASE_BAR].addr;
> + return smb_ioport_readb(&s->smb, offset);
> + }
> +
> + return 0xff;
> +}
> +
> +static const MemoryRegionOps lpc_smb_mmio_ops = {
> + .read = ich9_smb_ioport_readb,
> + .write = ich9_smb_ioport_writeb,
> + .endianness = DEVICE_LITTLE_ENDIAN,
> + .impl = {
> + .min_access_size = 1,
> + .max_access_size = 1,
> + },
> +};
> +
> +static int ich9_smbus_initfn(PCIDevice *d)
> +{
> + ICH9SMBState *s = ICH9_SMB_DEVICE(d);
> +
> + /* TODO? D31IP.SMIP in chipset configuration space */
> + pci_config_set_interrupt_pin(d->config, 0x01); /* interrupt pin 1 */
> +
> + pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
> +
> + /*
> + * update parameters based on
> + * paralell_hds[0]
> + * serial_hds[0]
> + * serial_hds[0]
> + * fdc
> + *
> + * Is there any OS that depends on them?
> + */
> +
> + /* TODO smb_io_base */
> + pci_set_byte(d->config + ICH9_SMB_HOSTC, 0);
> + /* TODO bar0, bar1: 64bit BAR support*/
> +
> + memory_region_init_io(&s->mem_bar, &lpc_smb_mmio_ops, s, "ich9-smbus-bar",
> + ICH9_SMB_SMB_BASE_SIZE);
> + pci_register_bar(d, ICH9_SMB_SMB_BASE_BAR, PCI_BASE_ADDRESS_SPACE_IO,
> + &s->mem_bar);
> + pm_smbus_init(&d->qdev, &s->smb);
> + return 0;
> +}
> +
> +static void ich9_smb_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
> +
> + k->vendor_id = PCI_VENDOR_ID_INTEL;
> + k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
> + k->revision = ICH9_A2_SMB_REVISION;
> + k->class_id = PCI_CLASS_SERIAL_SMBUS;
> + dc->no_user = 1;
> + dc->vmsd = &vmstate_ich9_smbus;
> + dc->desc = "ICH9 SMBUS Bridge";
> + k->init = ich9_smbus_initfn;
> +}
> +
> +i2c_bus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
> +{
> + PCIDevice *d =
> + pci_create_simple_multifunction(bus, devfn, true, TYPE_ICH9_SMB_DEVICE);
> + ICH9SMBState *s = ICH9_SMB_DEVICE(d);
> + return s->smb.smbus;
> +}
> +
> +static const TypeInfo ich9_smb_info = {
> + .name = TYPE_ICH9_SMB_DEVICE,
> + .parent = TYPE_PCI_DEVICE,
> + .instance_size = sizeof(ICH9SMBState),
> + .class_init = ich9_smb_class_init,
> +};
> +
> +static void ich9_smb_register(void)
> +{
> + type_register_static(&ich9_smb_info);
> +}
> +
> +type_init(ich9_smb_register);
> --
> 1.7.1
next prev parent reply other threads:[~2012-10-22 10:11 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-19 20:43 [Qemu-devel] [PATCH v3 00/26] q35 qemu support Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 01/26] blockdev: Introduce a default machine blockdev interface field, QEMUMachine->mach_if Jason Baron
2012-10-22 10:47 ` Michael S. Tsirkin
2012-10-22 11:26 ` Kevin Wolf
2012-10-22 18:02 ` Jason Baron
2012-10-24 13:12 ` Markus Armbruster
2012-10-24 19:41 ` Jason Baron
2012-10-26 10:28 ` Markus Armbruster
2012-10-26 9:53 ` Markus Armbruster
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 02/26] blockdev: Introduce IF_AHCI Jason Baron
2012-10-22 10:48 ` Michael S. Tsirkin
2012-10-22 11:40 ` Kevin Wolf
2012-10-22 18:11 ` Jason Baron
2012-10-24 15:50 ` Markus Armbruster
2012-10-24 19:36 ` Jason Baron
2012-10-26 12:56 ` Markus Armbruster
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 03/26] pci: pci capability must be in PCI space Jason Baron
2012-10-22 10:48 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 04/26] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle Jason Baron
2012-10-22 10:51 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 05/26] pc, pc_piix: split out pc nic initialization Jason Baron
2012-10-22 13:27 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 06/26] pc: Move ioapic_init() from pc_piix.c to pc.c Jason Baron
2012-10-22 13:28 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 07/26] pc/piix_pci: factor out smram/pam logic Jason Baron
2012-10-22 11:05 ` Michael S. Tsirkin
2012-10-29 16:21 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 09/26] pci: Add class 0xc05 as 'SMBus' Jason Baron
2012-10-22 10:52 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 08/26] pci_ids: add intel 82801BA pci-to-pci bridge id Jason Baron
2012-10-22 10:51 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 10/26] pcie: pass pcie window size to pcie_host_mmcfg_update() Jason Baron
2012-10-22 10:54 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 12/26] ich9: Add acpi support and definitions Jason Baron
2012-10-22 11:07 ` Michael S. Tsirkin
2012-10-22 11:22 ` Michael S. Tsirkin
2012-10-29 16:29 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 11/26] pcie: Convert PCIExpressHost to use the QOM Jason Baron
2012-10-22 10:55 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 13/26] ich9: Add the lpc chip Jason Baron
2012-10-22 11:12 ` Michael S. Tsirkin
2012-10-22 11:27 ` Michael S. Tsirkin
2012-10-23 4:22 ` Isaku Yamahata
2012-10-29 16:20 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 14/26] ich9: Add smbus Jason Baron
2012-10-22 11:13 ` Michael S. Tsirkin [this message]
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 15/26] q35: Introduce q35 pc based chipset emulator Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 16/26] ich9: Add i82801b11 dmi-to-pci bridge Jason Baron
2012-10-22 13:53 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 18/26] q35: Suppress SMM BIOS initialization under KVM Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 17/26] Add i21154 bridge chip Jason Baron
2012-10-22 13:26 ` Andreas Färber
2012-10-22 16:17 ` Michael S. Tsirkin
2012-10-22 18:18 ` Jason Baron
2012-10-22 18:53 ` Andreas Färber
2012-10-27 12:42 ` Blue Swirl
2012-10-22 14:03 ` Michael S. Tsirkin
2012-10-22 20:48 ` Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 19/26] q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic Jason Baron
2012-10-22 14:04 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 20/26] q35: smbus: Remove PCI_STATUS_SIG_SYSTEM_ERROR and PCI_STATUS_DETECTED_PARITY from w1cmask Jason Baron
2012-10-21 12:26 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 21/26] q35: Add kvmclock support Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 23/26] q35: automatically load the q35 dsdt table Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 22/26] Add a fallback bios file search, if -L fails Jason Baron
2012-10-21 7:26 ` Michael Tokarev
2012-10-21 9:52 ` Peter Maydell
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 24/26] q35: add acpi-based pci hotplug Jason Baron
2012-10-22 14:09 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 25/26] q35: fill in usb pci slots with -usb Jason Baron
2012-10-22 5:54 ` Gerd Hoffmann
2012-10-24 17:10 ` Paolo Bonzini
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 26/26] ich9: add support pci assignment Jason Baron
2012-10-20 16:15 ` [Qemu-devel] [PATCH v3 00/26] q35 qemu support Michael Tokarev
2012-10-21 12:36 ` Michael S. Tsirkin
2012-10-21 12:43 ` Michael S. Tsirkin
2012-10-22 5:58 ` Gerd Hoffmann
2012-10-22 10:08 ` Michael S. Tsirkin
2012-10-22 10:37 ` Gerd Hoffmann
2012-10-22 13:16 ` Michael S. Tsirkin
2012-10-22 13:00 ` Eric Blake
2012-10-22 14:23 ` Michael S. Tsirkin
2012-10-22 14:03 ` Eric Blake
2012-10-22 14:39 ` Alexander Graf
2012-10-22 15:37 ` Anthony Liguori
2012-10-27 8:12 ` Michael Tokarev
2012-10-22 13:34 ` Michael S. Tsirkin
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