From: Jason Baron <jbaron@redhat.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: agraf@suse.de, aliguori@us.ibm.com, juzhang@redhat.com,
jan.kiszka@siemens.com, qemu-devel@nongnu.org, armbru@redhat.com,
blauwirbel@gmail.com, yamahata@valinux.co.jp,
alex.williamson@redhat.com, kevin@koconnor.net, avi@redhat.com,
mkletzan@redhat.com, pbonzini@redhat.com, lcapitulino@redhat.com,
afaerber@suse.de, kraxel@redhat.com
Subject: Re: [Qemu-devel] [PATCH v3 17/26] Add i21154 bridge chip.
Date: Mon, 22 Oct 2012 16:48:30 -0400 [thread overview]
Message-ID: <20121022204830.GD23972@redhat.com> (raw)
In-Reply-To: <20121022140305.GA18523@redhat.com>
On Mon, Oct 22, 2012 at 04:03:05PM +0200, Michael S. Tsirkin wrote:
> On Fri, Oct 19, 2012 at 04:43:37PM -0400, Jason Baron wrote:
> > From: Jason Baron <jbaron@redhat.com>
> >
> > This adds support for the DECchip 21154 PCI bridge.
> >
> > Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
> > Signed-off-by: Jason Baron <jbaron@redhat.com>
> > ---
> > hw/Makefile.objs | 2 +-
> > hw/i21154.c | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++
> > hw/i21154.h | 9 ++++
> > 3 files changed, 123 insertions(+), 1 deletions(-)
> > create mode 100644 hw/i21154.c
> > create mode 100644 hw/i21154.h
> >
> > diff --git a/hw/Makefile.objs b/hw/Makefile.objs
> > index ef444d8..eb18a55 100644
> > --- a/hw/Makefile.objs
> > +++ b/hw/Makefile.objs
> > @@ -9,7 +9,7 @@ common-obj-$(CONFIG_PCI) += shpc.o
> > common-obj-$(CONFIG_PCI) += slotid_cap.o
> > common-obj-$(CONFIG_PCI) += pci_host.o pcie_host.o
> > common-obj-$(CONFIG_PCI) += ioh3420.o xio3130_upstream.o xio3130_downstream.o
> > -common-obj-$(CONFIG_PCI) += i82801b11.o
> > +common-obj-$(CONFIG_PCI) += i82801b11.o i21154.o
> > common-obj-y += watchdog.o
> > common-obj-$(CONFIG_ISA_MMIO) += isa_mmio.o
> > common-obj-$(CONFIG_ECC) += ecc.o
> > diff --git a/hw/i21154.c b/hw/i21154.c
> > new file mode 100644
> > index 0000000..93faa59
> > --- /dev/null
> > +++ b/hw/i21154.c
> > @@ -0,0 +1,113 @@
> > +/*
> > + * Copyright (c) 2006 Fabrice Bellard
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a copy
> > + * of this software and associated documentation files (the "Software"), to deal
> > + * in the Software without restriction, including without limitation the rights
> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
> > + * copies of the Software, and to permit persons to whom the Software is
> > + * furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be included in
> > + * all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
> > + * THE SOFTWARE.
> > + */
> > +/*
> > + * QEMU i21154 PCI Bridge Emulation
> > + *
> > + * Copyright (c) 2009, 2010, 2011
> > + * Isaku Yamahata <yamahata at valinux co jp>
> > + * VA Linux Systems Japan K.K.
> > + * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
> > + *
> > + * This library is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU Lesser General Public
> > + * License as published by the Free Software Foundation; either
> > + * version 2 of the License, or (at your option) any later version.
> > + *
> > + * This library is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
> > + * Lesser General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU Lesser General Public
> > + * License along with this library; if not, see <http://www.gnu.org/licenses/>
> > + */
> > +
> > +#include "i21154.h"
> > +#include "pci_ids.h"
> > +#include "pci.h"
> > +#include "pci_bridge.h"
> > +#include "pci_internals.h"
> > +
> > +/* i21154 pci bridge*/
> > +
> > +typedef struct I21154Bridge {
> > + PCIBridge br;
> > +} I21154Bridge;
> > +
> > +static int i21154_bridge_initfn(PCIDevice *d)
> > +{
> > + int rc;
> > +
> > + rc = pci_bridge_initfn(d);
> > + if (rc < 0) {
> > + return rc;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +#define I21154_REV 0x05
> > +#define I21154_PI 0x00
>
> _PI seems unused
>
I21154_PI was used in Yamahata's original patch, for the
'prog_interface' field. I didn't find it in my conversion to QOM.
However, I should have used:
pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val)
Anyways, we can drop this patch for the 'hw/dec_pci.c', and we can set
it there.
> > +
> > +static void i21154_bridge_class_init(ObjectClass *klass, void *data)
> > +{
> > + PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
> > +
> > + k->is_bridge = 1;
> > + k->vendor_id = PCI_VENDOR_ID_DEC;
> > + k->device_id = PCI_DEVICE_ID_DEC_21154;
> > + k->revision = I21154_REV;
> > + k->init = i21154_bridge_initfn;
> > +}
> > +
> > +static const TypeInfo i21154_bridge_info = {
> > + .name = "i21154-bridge",
> > + .parent = TYPE_PCI_DEVICE,
> > + .instance_size = sizeof(I21154Bridge),
> > + .class_init = i21154_bridge_class_init,
> > +};
> > +
> > +PCIBridge *i21154_init(PCIBus *bus, int devfn, const char *bus_name,
> > + bool multifunction)
> > +{
> > + PCIDevice *d;
> > + PCIBridge *br;
> > + DeviceState *qdev;
> > +
> > + d = pci_create_multifunction(bus, devfn, multifunction, "i21154-bridge");
> > + if (!d) {
> > + return NULL;
> > + }
> > + br = DO_UPCAST(PCIBridge, dev, d);
> > + qdev = &br->dev.qdev;
> > +
> > + pci_bridge_map_irq(br, bus_name, pci_swizzle_map_irq_fn);
> > + qdev_init_nofail(qdev);
> > +
> > + return br;
> > +}
> > +
> > +static void i21154_register(void)
> > +{
> > + type_register_static(&i21154_bridge_info);
> > +}
> > +type_init(i21154_register);
> > diff --git a/hw/i21154.h b/hw/i21154.h
> > new file mode 100644
> > index 0000000..0cf8753
> > --- /dev/null
> > +++ b/hw/i21154.h
> > @@ -0,0 +1,9 @@
> > +#ifndef QEMU_I21154_H
> > +#define QEMU_I21154_H
> > +
> > +#include "pci.h"
> > +
> > +PCIBridge *i21154_init(PCIBus *bus, int devfn, const char *bus_name,
> > + bool multifunction);
> > +
> > +#endif /* QEMU_I21154_H */
>
> Looks like one can create this device through -device but if
> one does i21154_init is not called.
> Do we need i21154_init? Can we initialize the device through the
> type system in the regular way?
>
> Same applies to other system devices.
>
The common pattern in these '_init' functions is:
dev = pci_create_multifunction(parent_bus, devfn, false,
"bridge name foo");
br = DO_UPCAST(PCIBridge, dev, dev);
pci_bridge_map_irq(br, "foo bridge", map_irq);
qdev_init_nofail(&dev->qdev);
However, when we initialize bridges through the type system, we
typically end up without a 'map_irq' function, since we haven't set
one via 'pci_bridge_map_irq'.
A quick hack fix is below (which might be ok for the short term).
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -321,6 +321,9 @@ int pci_bridge_initfn(PCIDevice *dev)
qbus_create_inplace(&sec_bus->qbus, TYPE_PCI_BUS, &dev->qdev,
br->bus_name);
sec_bus->parent_dev = dev;
+ if (!br->map_irq) {
+ br->map_irq = pci_swizzle_map_irq_fn;
+ }
sec_bus->map_irq = br->map_irq;
sec_bus->address_space_mem = &br->address_space_mem;
memory_region_init(&br->address_space_mem, "pci_bridge_pci", INT64_MAX);
A more proper solution might be to introduce an abstract PCIBridgeClass,
and have all of the bridges inherit from there instead of PCIDevice and
then initialize the map_irq function there. And then have these '_init'
functions overwrite things if they want to.
Thanks,
-Jason
next prev parent reply other threads:[~2012-10-22 20:48 UTC|newest]
Thread overview: 87+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-19 20:43 [Qemu-devel] [PATCH v3 00/26] q35 qemu support Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 01/26] blockdev: Introduce a default machine blockdev interface field, QEMUMachine->mach_if Jason Baron
2012-10-22 10:47 ` Michael S. Tsirkin
2012-10-22 11:26 ` Kevin Wolf
2012-10-22 18:02 ` Jason Baron
2012-10-24 13:12 ` Markus Armbruster
2012-10-24 19:41 ` Jason Baron
2012-10-26 10:28 ` Markus Armbruster
2012-10-26 9:53 ` Markus Armbruster
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 02/26] blockdev: Introduce IF_AHCI Jason Baron
2012-10-22 10:48 ` Michael S. Tsirkin
2012-10-22 11:40 ` Kevin Wolf
2012-10-22 18:11 ` Jason Baron
2012-10-24 15:50 ` Markus Armbruster
2012-10-24 19:36 ` Jason Baron
2012-10-26 12:56 ` Markus Armbruster
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 03/26] pci: pci capability must be in PCI space Jason Baron
2012-10-22 10:48 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 04/26] pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle Jason Baron
2012-10-22 10:51 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 05/26] pc, pc_piix: split out pc nic initialization Jason Baron
2012-10-22 13:27 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 06/26] pc: Move ioapic_init() from pc_piix.c to pc.c Jason Baron
2012-10-22 13:28 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 07/26] pc/piix_pci: factor out smram/pam logic Jason Baron
2012-10-22 11:05 ` Michael S. Tsirkin
2012-10-29 16:21 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 09/26] pci: Add class 0xc05 as 'SMBus' Jason Baron
2012-10-22 10:52 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 08/26] pci_ids: add intel 82801BA pci-to-pci bridge id Jason Baron
2012-10-22 10:51 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 10/26] pcie: pass pcie window size to pcie_host_mmcfg_update() Jason Baron
2012-10-22 10:54 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 11/26] pcie: Convert PCIExpressHost to use the QOM Jason Baron
2012-10-22 10:55 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 12/26] ich9: Add acpi support and definitions Jason Baron
2012-10-22 11:07 ` Michael S. Tsirkin
2012-10-22 11:22 ` Michael S. Tsirkin
2012-10-29 16:29 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 13/26] ich9: Add the lpc chip Jason Baron
2012-10-22 11:12 ` Michael S. Tsirkin
2012-10-22 11:27 ` Michael S. Tsirkin
2012-10-23 4:22 ` Isaku Yamahata
2012-10-29 16:20 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 15/26] q35: Introduce q35 pc based chipset emulator Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 14/26] ich9: Add smbus Jason Baron
2012-10-22 11:13 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 16/26] ich9: Add i82801b11 dmi-to-pci bridge Jason Baron
2012-10-22 13:53 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 18/26] q35: Suppress SMM BIOS initialization under KVM Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 17/26] Add i21154 bridge chip Jason Baron
2012-10-22 13:26 ` Andreas Färber
2012-10-22 16:17 ` Michael S. Tsirkin
2012-10-22 18:18 ` Jason Baron
2012-10-22 18:53 ` Andreas Färber
2012-10-27 12:42 ` Blue Swirl
2012-10-22 14:03 ` Michael S. Tsirkin
2012-10-22 20:48 ` Jason Baron [this message]
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 19/26] q35: Fix non-PCI IRQ processing in ich9_lpc_update_apic Jason Baron
2012-10-22 14:04 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 20/26] q35: smbus: Remove PCI_STATUS_SIG_SYSTEM_ERROR and PCI_STATUS_DETECTED_PARITY from w1cmask Jason Baron
2012-10-21 12:26 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 21/26] q35: Add kvmclock support Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 23/26] q35: automatically load the q35 dsdt table Jason Baron
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 22/26] Add a fallback bios file search, if -L fails Jason Baron
2012-10-21 7:26 ` Michael Tokarev
2012-10-21 9:52 ` Peter Maydell
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 25/26] q35: fill in usb pci slots with -usb Jason Baron
2012-10-22 5:54 ` Gerd Hoffmann
2012-10-24 17:10 ` Paolo Bonzini
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 24/26] q35: add acpi-based pci hotplug Jason Baron
2012-10-22 14:09 ` Michael S. Tsirkin
2012-10-19 20:43 ` [Qemu-devel] [PATCH v3 26/26] ich9: add support pci assignment Jason Baron
2012-10-20 16:15 ` [Qemu-devel] [PATCH v3 00/26] q35 qemu support Michael Tokarev
2012-10-21 12:36 ` Michael S. Tsirkin
2012-10-21 12:43 ` Michael S. Tsirkin
2012-10-22 5:58 ` Gerd Hoffmann
2012-10-22 10:08 ` Michael S. Tsirkin
2012-10-22 10:37 ` Gerd Hoffmann
2012-10-22 13:16 ` Michael S. Tsirkin
2012-10-22 13:00 ` Eric Blake
2012-10-22 14:23 ` Michael S. Tsirkin
2012-10-22 14:03 ` Eric Blake
2012-10-22 14:39 ` Alexander Graf
2012-10-22 15:37 ` Anthony Liguori
2012-10-27 8:12 ` Michael Tokarev
2012-10-22 13:34 ` Michael S. Tsirkin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20121022204830.GD23972@redhat.com \
--to=jbaron@redhat.com \
--cc=afaerber@suse.de \
--cc=agraf@suse.de \
--cc=alex.williamson@redhat.com \
--cc=aliguori@us.ibm.com \
--cc=armbru@redhat.com \
--cc=avi@redhat.com \
--cc=blauwirbel@gmail.com \
--cc=jan.kiszka@siemens.com \
--cc=juzhang@redhat.com \
--cc=kevin@koconnor.net \
--cc=kraxel@redhat.com \
--cc=lcapitulino@redhat.com \
--cc=mkletzan@redhat.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=yamahata@valinux.co.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).