Re: [Qemu-devel] [Qemu-trivial] [PATCH v2] target-mips: Clean up microMIPS32 major opcode

[Stefan Hajnoczi <stefanha@gmail.com>]

On Fri, Nov 16, 2012 at 10:05:52AM +0800, 陳韋任 (Wei-Ren Chen) wrote:
> Hi all,
> 
>   I check MIPS microMIPS manual [1], and found the major opcode might be
> wrong. I add a comment to explicitly indicate what manual I am refering
> to, and according that manual I remove microMIPS32 major opcodes 0x1f.
> As for others, like 0x16, 0x17, 0x36 and 0x37, they are for higher-order
> MIPS ISA level or new revision of this microMIPS architecture. Quote
> from Johnson, they are belong MIPS64 [2].
> 
>   Please review, thanks.
> 
> [1] http://www.mips.com/products/architectures/micromips/#specifications
> 
>     MIPS Architecture for Programmers Volume II-B:
>       The microMIPS32 Instruction Set (Revision 3.05)
> 
>     MD00582-2B-microMIPS-AFP-03.05.pdf
> 
> [2] http://www.mips.com/products/architectures/mips64/
> 
>     MIPS Architecture For Programmers
>       Volume II-A: The MIPS64 Instruction Set
> 
>     MD00087-2B-MIPS64BIS-AFP-03.51.pdf
> 
> Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
> ---
>  target-mips/translate.c |   24 +++++++++++++++++-------
>  1 files changed, 17 insertions(+), 7 deletions(-)

Please send this through Aurelian as maintainer for target-mips/.  The
discussion on previous the thread show this isn't qemu-trivial material
:).

Stefan