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From: David Gibson <dwg@au1.ibm.com>
To: agraf@suse.de
Cc: Mike Qiu <qiudayu@linux.vnet.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified
Date: Tue, 4 Dec 2012 14:11:45 +1100	[thread overview]
Message-ID: <20121204031145.GG4293@truffula.fritz.box> (raw)
In-Reply-To: <1354588937-27122-14-git-send-email-david@gibson.dropbear.id.au>

On Tue, Dec 04, 2012 at 01:42:17PM +1100, David Gibson wrote:
> From: Mike Qiu <qiudayu@linux.vnet.ibm.com>

Oops, messed this one up, build error for user only builds.  Fixed
version below.

>From d2cc6bcee4737647c4bbbf65d3c0129d4a119dd3 Mon Sep 17 00:00:00 2001
From: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Date: Tue, 4 Dec 2012 10:52:14 +1100
Subject: [PATCH] target-ppc: Give a meaningful error if too many threads are
 specified

Currently the target-ppc tcg code only supports a single thread.  You can
specify more, but they're treated identically to multiple cores.  On KVM
we obviously can't support more threads than the hardware; if more are
specified it will cause strange and cryptic errors.

This patch clarifies the situation by giving a simple meaningful error if
more threads are specified than we can support.

Signed-off-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target-ppc/translate_init.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index dba572f..bb054a7 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -28,6 +28,7 @@
 #include <kvm.h>
 #include "kvm_ppc.h"
 #include "arch_init.h"
+#include "cpus.h"
 
 //#define PPC_DUMP_CPU
 //#define PPC_DEBUG_SPR
@@ -10037,6 +10038,10 @@ static int ppc_fixup_cpu(CPUPPCState *env)
 
 int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
 {
+#if !defined(CONFIG_USER_ONLY)
+    int max_smt = kvmppc_smt_threads();
+#endif
+
     env->msr_mask = def->msr_mask;
     env->mmu_model = def->mmu_model;
     env->excp_model = def->excp_model;
@@ -10046,6 +10051,13 @@ int cpu_ppc_register_internal (CPUPPCState *env, const ppc_def_t *def)
     env->flags = def->flags;
     env->bfd_mach = def->bfd_mach;
     env->check_pow = def->check_pow;
+#if !defined(CONFIG_USER_ONLY)
+    if (smp_threads > max_smt) {
+        fprintf(stderr, "Cannot support more than %d threads on PPC with %s\n",
+                max_smt, kvm_enabled() ? "KVM" : "TCG");
+        exit(1);
+    }
+#endif
 
 #if defined(TARGET_PPC64)
     if (def->sps)

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

  reply	other threads:[~2012-12-04  3:10 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-12-04  2:42 [Qemu-devel] [0/13] Pending pseries/ppc patches as at 1.3 release David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 01/13] pseries: Fix incorrect initialization of interrupt controller David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 02/13] pseries: Use #define for XICS base irq number David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 03/13] pseries: Return the token when we register an RTAS call David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 04/13] pseries: Allow RTAS tokens without a qemu handler David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 05/13] pseries: Add tracepoints to the XICS interrupt controller David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 06/13] pseries: Split xics irq configuration from state information David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 07/13] pseries: Implement PAPR NVRAM David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 08/13] pseries: Update SLOF for NVRAM support David Gibson
2012-12-04 13:20   ` Erlon Cruz
2012-12-04 22:54     ` [Qemu-devel] [Qemu-ppc] " David Gibson
2012-12-04 23:27       ` Erlon Cruz
2012-12-05  0:13         ` David Gibson
2012-12-05  2:27     ` [Qemu-devel] " Alexander Graf
2012-12-05 14:09       ` Erlon Cruz
2012-12-05 14:35         ` Alexander Graf
2012-12-05 14:37           ` [Qemu-devel] [Qemu-ppc] " Alexander Graf
2012-12-05 14:39             ` Alexander Graf
2012-12-06 19:41               ` Erlon Cruz
2012-12-06 19:41             ` Erlon Cruz
2012-12-06 19:41           ` [Qemu-devel] " Erlon Cruz
2012-12-07  8:10         ` [Qemu-devel] [Qemu-ppc] " Nikunj A Dadhania
2012-12-07 11:48           ` Erlon Cruz
2012-12-07 11:55             ` Alexander Graf
2012-12-04  2:42 ` [Qemu-devel] [PATCH 09/13] pseries: Don't allow TCE (iommu) tables to be registered with duplicate LIOBNs David Gibson
2012-12-04  2:42 ` [Qemu-devel] [PATCH 10/13] target-ppc: Don't use hwaddr to represent hardware state David Gibson
2012-12-13 12:51   ` Alexander Graf
2012-12-04  2:42 ` [Qemu-devel] [PATCH 11/13] pseries: Fixes and enhancements to L1 cache properties David Gibson
2012-12-13 12:50   ` Alexander Graf
2012-12-17  2:32     ` [Qemu-devel] [Qemu-ppc] " David Gibson
2012-12-17 10:10       ` Alexander Graf
2012-12-17 23:00         ` David Gibson
2012-12-17 23:49           ` Alexander Graf
2012-12-19  4:34             ` David Gibson
2012-12-19 22:40               ` Alexander Graf
2012-12-20  3:38                 ` David Gibson
2012-12-20  9:32                   ` Alexander Graf
2012-12-04  2:42 ` [Qemu-devel] [PATCH 12/13] pseries: Increase default NVRAM size David Gibson
2012-12-13 12:51   ` Alexander Graf
2012-12-04  2:42 ` [Qemu-devel] [PATCH 13/13] target-ppc: Give a meaningful error if too many threads are specified David Gibson
2012-12-04  3:11   ` David Gibson [this message]
2012-12-13 12:57     ` Alexander Graf
2012-12-13 13:17       ` David Gibson
2012-12-13 13:19         ` Alexander Graf
2012-12-13 14:17           ` Peter Maydell
2012-12-13 14:18             ` Peter Maydell
2012-12-17  2:13               ` David Gibson

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