From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:58635) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tfmit-0004Tm-85 for qemu-devel@nongnu.org; Tue, 04 Dec 2012 02:15:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Tfmip-00040N-47 for qemu-devel@nongnu.org; Tue, 04 Dec 2012 02:15:19 -0500 Received: from mail-pb0-f45.google.com ([209.85.160.45]:51745) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Tfmio-000409-SK for qemu-devel@nongnu.org; Tue, 04 Dec 2012 02:15:15 -0500 Received: by mail-pb0-f45.google.com with SMTP id mc8so2452715pbc.4 for ; Mon, 03 Dec 2012 23:15:14 -0800 (PST) Date: Tue, 4 Dec 2012 15:14:48 +0800 From: walimis Message-ID: <20121204071448.GI6029@pek-lwang0-d1> References: <1354417042-8818-1-git-send-email-andreas.faerber@web.de> <1354417042-8818-4-git-send-email-andreas.faerber@web.de> <50BCF4C5.8000006@samsung.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <50BCF4C5.8000006@samsung.com> Subject: Re: [Qemu-devel] [PATCH RFT 3/5] usb/ehci: Add SysBus EHCI device for Exynos4210 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: andreas.faerber@web.de Cc: peter.crosthwaite@xilinx.com, Kyungmin Park , qemu-devel@nongnu.org, kraxel@redhat.com On Mon, Dec 03, 2012 at 10:51:49PM +0400, Igor Mitsyanko wrote: >On 12/02/2012 06:57 AM, Andreas Färber wrote: >>It uses a different capsbase and opregbase than the Xilinx device. >> >>Signed-off-by: Liming Wang >>Signed-off-by: Andreas Färber >>Cc: Igor Mitsyanko >>--- >> hw/usb/hcd-ehci-sysbus.c | 15 +++++++++++++++ >> hw/usb/hcd-ehci.h | 2 ++ >> 2 Dateien geändert, 17 Zeilen hinzugefügt(+) >> >>diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c >>index 38e82bb..2ac61e6 100644 >>--- a/hw/usb/hcd-ehci-sysbus.c >>+++ b/hw/usb/hcd-ehci-sysbus.c >>@@ -103,10 +103,25 @@ static const TypeInfo ehci_xlnx_type_info = { >> .class_init = ehci_xlnx_class_init, >> }; >> >>+static void ehci_exynos4210_class_init(ObjectClass *oc, void *data) >>+{ >>+ SysBusEHCIClass *sec = SYS_BUS_EHCI_CLASS(oc); >>+ >>+ sec->capsbase = 0x0; >>+ sec->opregbase = 0x40; >>+} > >Hi, Liming, where did you get value 0x40 for opregbase? My >documentation states that its 0x10 for Exynos4210 soc. Hi Andreas, Please update the value of opregbase to 0x10. Thanks, Liming Wang > > >>+ >>+static const TypeInfo ehci_exynos4210_type_info = { >>+ .name = TYPE_EXYNOS4210_EHCI, >>+ .parent = TYPE_SYS_BUS_EHCI, >>+ .class_init = ehci_exynos4210_class_init, >>+}; >>+ >> static void ehci_sysbus_register_types(void) >> { >> type_register_static(&ehci_type_info); >> type_register_static(&ehci_xlnx_type_info); >>+ type_register_static(&ehci_exynos4210_type_info); >> } >> >> type_init(ehci_sysbus_register_types) >>diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h >>index d8078f4..b8b6461 100644 >>--- a/hw/usb/hcd-ehci.h >>+++ b/hw/usb/hcd-ehci.h >>@@ -314,6 +314,8 @@ struct EHCIState { >> bool int_req_by_async; >> }; >> >>+#define TYPE_EXYNOS4210_EHCI "exynos4210-usb" >>+ > >Maybe use a more descriptive name "exynos4210-usb-ehci" here, for >consistency with hcd-ehci-pci.c. > >But anyway, I tested it, it works fine) > >Reviewed-by: Igor Mitsyanko > > >> extern const VMStateDescription vmstate_ehci; >> >> void usb_ehci_initfn(EHCIState *s, DeviceState *dev); >> > > >-- >Mitsyanko Igor >ASWG, Moscow R&D center, Samsung Electronics >email: i.mitsyanko@samsung.com