From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:42684) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgWXU-0002II-Go for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:10:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TgWXO-00012m-38 for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:10:36 -0500 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:58505) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgWXN-000107-TF for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:10:30 -0500 Date: Thu, 6 Dec 2012 09:10:12 +0100 From: Aurelien Jarno Message-ID: <20121206081012.GA4244@ohm.aurel32.net> References: <1353942801-24441-1-git-send-email-petar.jovanovic@rt-rk.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1353942801-24441-1-git-send-email-petar.jovanovic@rt-rk.com> Subject: Re: [Qemu-devel] [PATCH] target-mips: Fix incorrect code and test for INSV List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Petar Jovanovic Cc: petarj@mips.com, qemu-devel@nongnu.org, qemu-stable@nongnu.org On Mon, Nov 26, 2012 at 04:13:21PM +0100, Petar Jovanovic wrote: > From: Petar Jovanovic > > Content of register rs should be shifted for pos before applying a mask. > This change contains both fix for the instruction and to the existing test. > > Signed-off-by: Petar Jovanovic > --- > target-mips/dsp_helper.c | 2 +- > tests/tcg/mips/mips32-dsp/insv.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c > index e7949c2..fda5f04 100644 > --- a/target-mips/dsp_helper.c > +++ b/target-mips/dsp_helper.c > @@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs, \ > \ > filter = ((int32_t)0x01 << size) - 1; \ > filter = filter << pos; \ > - temprs = rs & filter; \ > + temprs = (rs << pos) & filter; \ > temprt = rt & ~filter; \ > temp = temprs | temprt; \ > \ > diff --git a/tests/tcg/mips/mips32-dsp/insv.c b/tests/tcg/mips/mips32-dsp/insv.c > index 7e3b047..243b007 100644 > --- a/tests/tcg/mips/mips32-dsp/insv.c > +++ b/tests/tcg/mips/mips32-dsp/insv.c > @@ -10,7 +10,7 @@ int main() > dsp = 0x305; > rt = 0x12345678; > rs = 0x87654321; > - result = 0x12345338; > + result = 0x12345438; > __asm > ("wrdsp %2, 0x03\n\t" > "insv %0, %1\n\t" Thanks, applied. I added a CC: to qemu-stable@nongnu.org, as it is definitely stable material. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net