From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:43965) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgWe8-0005Yd-Qu for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:17:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TgWe3-0002sW-Ho for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:17:28 -0500 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:58538) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TgWe3-0002sN-B6 for qemu-devel@nongnu.org; Thu, 06 Dec 2012 03:17:23 -0500 Date: Thu, 6 Dec 2012 09:17:11 +0100 From: Aurelien Jarno Message-ID: <20121206081711.GC4244@ohm.aurel32.net> References: <1354663750-2163-1-git-send-email-petar.jovanovic@rt-rk.com> <50BF69EA.8080306@twiddle.net> <50BF6D9D.2030901@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH v2] target-mips: Fix incorrect shift for SHILO and SHILOV List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: rth7680@gmail.com, qemu-devel@nongnu.org, Petar Jovanovic , blauwirbel@gmail.com, petarj@mips.com, afaerber@suse.de, Richard Henderson On Wed, Dec 05, 2012 at 04:38:22PM +0000, Peter Maydell wrote: > On 5 December 2012 15:51, Richard Henderson wrote: > > On 2012-12-05 09:49, Peter Maydell wrote: > >> On 5 December 2012 15:36, Richard Henderson wrote: > >>> On 2012-12-04 17:29, Petar Jovanovic wrote: > >>>> rs5_0 = (int8_t)(rs5_0 << 2) >> 2; > >>> > >>> This is more portably written as > >>> > >>> rs5_0 = (rs5_0 ^ 0x20) - 0x20; > >> > >> ...but way more obscurely. If we want to play that > >> kind of game can we have a sign-extension function in > >> a header somewhere? > > > > I dunno about more obscurely. It took me a minute to figure out > > what was wanted in the original. > > > > As for a helper function... sure. > > I don't think we should block this patch on that general > cleanup, though. All the sign extensions in target-mips/translate.c > are done in the double-shift way, so this is consistent with > the existing code. > While it might be a good idea to make QEMU even more portable, it should be noticed that currently QEMU assumes that a left shift followed by the same arithmetic right shift. This is the case in at least the alpha, arm, m68k, mips, ppc, s390 and unicore32 targets, as well as for implementing sign extension and division in TCG. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net