From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:42119) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TpzZe-00053k-DX for qemu-devel@nongnu.org; Tue, 01 Jan 2013 06:00:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TpzZd-0000Mp-05 for qemu-devel@nongnu.org; Tue, 01 Jan 2013 05:59:58 -0500 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:52719) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TpzZc-0000Lh-Pa for qemu-devel@nongnu.org; Tue, 01 Jan 2013 05:59:56 -0500 Date: Tue, 1 Jan 2013 11:59:49 +0100 From: "aurelien@aurel32.net" Message-ID: <20130101105949.GD16659@ohm.aurel32.net> References: <1355236110-4159-1-git-send-email-elta.era@gmail.com> <1355236110-4159-2-git-send-email-elta.era@gmail.com> <874D219413C17C42B1D2E0432B92BE5CBBE2911A@exchdb03.mips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <874D219413C17C42B1D2E0432B92BE5CBBE2911A@exchdb03.mips.com> Subject: Re: [Qemu-devel] [PATCH 2/3] Make-repl_ph-to-sign-extended-to-target_long List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Jovanovic, Petar" Cc: Dongxue Zhang , "qemu-devel@nongnu.org" , "chenwj@iis.sinica.edu.tw" , "rth@twiddle.net" On Tue, Dec 11, 2012 at 03:06:35PM +0000, Jovanovic, Petar wrote: > lgtm, though I wish there was a test for this in repl_ph.c. > > + cc Aurelien J. > > Petar > ________________________________________ > From: Dongxue Zhang [elta.era@gmail.com] > Sent: Tuesday, December 11, 2012 3:28 PM > To: qemu-devel@nongnu.org > Cc: chenwj@iis.sinica.edu.tw; Jovanovic, Petar; rth@twiddle.net; Dongxue Zhang > Subject: [PATCH 2/3] Make-repl_ph-to-sign-extended-to-target_long > > The immediate value is 9bits, should sign-extend to 16bits. The return value to > register should sign-extend to target_long, as Richard says, removing an > unnecessary cast works fun. > > Signed-off-by: Dongxue Zhang > --- > target-mips/translate.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/target-mips/translate.c b/target-mips/translate.c > index 65e6725..1701ca3 100644 > --- a/target-mips/translate.c > +++ b/target-mips/translate.c > @@ -13769,9 +13769,10 @@ static void gen_mipsdsp_bitinsn(CPUMIPSState *env, DisasContext *ctx, > check_dsp(ctx); > { > imm = (ctx->opcode >> 16) & 0x03FF; > + imm = (int16_t)(imm << 6) >> 6; > tcg_gen_movi_tl(cpu_gpr[ret], \ > (target_long)((int32_t)imm << 16 | \ > - (uint32_t)(uint16_t)imm)); > + (uint16_t)imm)); > } > break; > case OPC_REPLV_PH: Thanks, I have applied the patch after fixing the subject. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net