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* [Qemu-devel] [PATCH] e1000: document ICS read behaviour
@ 2013-01-09 22:01 Michael S. Tsirkin
  2013-01-10  8:26 ` Stefan Hajnoczi
  0 siblings, 1 reply; 7+ messages in thread
From: Michael S. Tsirkin @ 2013-01-09 22:01 UTC (permalink / raw)
  To: qemu-devel, Bill Paul
  Cc: Paolo Bonzini, Anthony Liguori, Jason Wang, Stefan Hajnoczi

Add code comment to clarify the reason we set ICS with ICR:
the reason was previously undocumented and git
log (commit b1332393cdd7d023de8f1f8aa136ee7866a18968)
confused rather than clarified the comments.
Digging in the mailing list archives gives the real reason
https://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00401.html

Add code comment with an explanation supplied by Bill Paul.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/e1000.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/hw/e1000.c b/hw/e1000.c
index 92fb00a..73e360e 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -230,7 +230,18 @@ set_interrupt_cause(E1000State *s, int index, uint32_t val)
         val |= E1000_ICR_INT_ASSERTED;
     }
     s->mac_reg[ICR] = val;
+
+    /*
+     * Make sure ICR and ICS registers have the same value.
+     * The spec says that the ICS register is write-only.  However in practice,
+     * on real hardware ICS is readable, and for reads it has the same value as
+     * ICR (except that ICS does not have the clear on read behaviour of ICR).
+     *
+     * The VxWorks PRO/1000 driver relies on this behaviour, so we have to
+     * emulate it.
+     */
     s->mac_reg[ICS] = val;
+
     qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0);
 }
 
-- 
MST

^ permalink raw reply related	[flat|nested] 7+ messages in thread
* [Qemu-devel] [PATCH] e1000: document ICS read behaviour
@ 2013-01-10 12:03 Michael S. Tsirkin
  2013-01-10 12:08 ` Michael S. Tsirkin
  2013-01-11  9:30 ` Stefan Hajnoczi
  0 siblings, 2 replies; 7+ messages in thread
From: Michael S. Tsirkin @ 2013-01-10 12:03 UTC (permalink / raw)
  To: qemu-devel, Bill Paul
  Cc: Paolo Bonzini, Anthony Liguori, Jason Wang, Stefan Hajnoczi,
	Michael S. Tsirkin

Add code comment to clarify the reason we set ICS with ICR:
the reason was previously undocumented and git
log (commit b1332393cdd7d023de8f1f8aa136ee7866a18968)
confused rather than clarified the comments.
Digging in the mailing list archives gives the real reason
https://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00401.html

Add code comment with an explanation supplied by Bill Paul.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
 hw/e1000.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/hw/e1000.c b/hw/e1000.c
index 92fb00a..d10119c 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -230,7 +230,17 @@ set_interrupt_cause(E1000State *s, int index, uint32_t val)
         val |= E1000_ICR_INT_ASSERTED;
     }
     s->mac_reg[ICR] = val;
+
+    /*
+     * Make sure ICR and ICS registers have the same value.
+     * The spec says that the ICS register is write-only.  However in practice,
+     * on real hardware ICS is readable, and for reads it has the same value as
+     * ICR (except that ICS does not have the clear on read behaviour of ICR).
+     *
+     * The VxWorks PRO/1000 driver uses this behaviour.
+     */
     s->mac_reg[ICS] = val;
+
     qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0);
 }
 
-- 
MST

^ permalink raw reply related	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2013-01-11  9:30 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
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2013-01-09 22:01 [Qemu-devel] [PATCH] e1000: document ICS read behaviour Michael S. Tsirkin
2013-01-10  8:26 ` Stefan Hajnoczi
2013-01-10 10:17   ` Michael S. Tsirkin
2013-01-10 11:50     ` Stefan Hajnoczi
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2013-01-10 12:03 Michael S. Tsirkin
2013-01-10 12:08 ` Michael S. Tsirkin
2013-01-11  9:30 ` Stefan Hajnoczi

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