From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:35516) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TtRat-0004rq-4G for qemu-devel@nongnu.org; Thu, 10 Jan 2013 18:31:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TtRaq-0002Hk-AV for qemu-devel@nongnu.org; Thu, 10 Jan 2013 18:31:31 -0500 Received: from mx1.redhat.com ([209.132.183.28]:56343) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TtRaq-0002HT-2f for qemu-devel@nongnu.org; Thu, 10 Jan 2013 18:31:28 -0500 Date: Fri, 11 Jan 2013 00:31:23 +0100 From: Igor Mammedov Message-ID: <20130111003123.74f2187b@thinkpad.mammed.net> In-Reply-To: <1357757632-1950-8-git-send-email-ehabkost@redhat.com> References: <1357757632-1950-1-git-send-email-ehabkost@redhat.com> <1357757632-1950-8-git-send-email-ehabkost@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC 07/12] target-i386/cpu: Introduce apic_id_for_cpu() function List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Eduardo Habkost Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, Andreas =?UTF-8?B?RsOkcmJlcg==?= On Wed, 9 Jan 2013 16:53:47 -0200 Eduardo Habkost wrote: > This function will be used by both the CPU initialization code and the > fw_cfg table initialization code. > > Later this function will be updated to generate APIC IDs according to > the CPU topology. > > Signed-off-by: Eduardo Habkost > --- > target-i386/cpu.c | 17 ++++++++++++++++- > target-i386/cpu.h | 2 ++ > 2 files changed, 18 insertions(+), 1 deletion(-) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 492656c..33787dc 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2192,6 +2192,21 @@ void x86_cpu_realize(Object *obj, Error **errp) > cpu_reset(CPU(cpu)); > } > > +/* Calculates initial APIC ID for a specific CPU index > + * > + * Currently we need to be able to calculate the APIC ID from the CPU index > + * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have > + * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of > + * all CPUs up to max_cpus. > + */ > +uint32_t apic_id_for_cpu(unsigned int cpu_index) > +{ > + /* right now APIC ID == CPU index. this will eventually change to use > + * the CPU topology configuration properly > + */ > + return cpu_index; > +} > + > static void x86_cpu_initfn(Object *obj) > { > CPUState *cs = CPU(obj); > @@ -2226,7 +2241,7 @@ static void x86_cpu_initfn(Object *obj) > x86_cpuid_get_tsc_freq, > x86_cpuid_set_tsc_freq, NULL, NULL, NULL); > > - env->cpuid_apic_id = cs->cpu_index; > + env->cpuid_apic_id = apic_id_for_cpu(cs->cpu_index); APIC ID is set by board so CPU shouldn't do it by itself. Could you create static property for it and set it from board using property instead? > > /* init various static tables used in TCG mode */ > if (tcg_enabled() && !inited) { > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index f3c9df5..dbd9899 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -1238,4 +1238,6 @@ void disable_kvm_pv_eoi(void); > /* Return name of 32-bit register, from a R_* constant */ > const char *get_register_name_32(unsigned int reg); > > +uint32_t apic_id_for_cpu(unsigned int cpu_index); > + > #endif /* CPU_I386_H */ > -- > 1.7.11.7 > -- Regards, Igor