From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49976) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UDWKG-0004sf-Es for qemu-devel@nongnu.org; Thu, 07 Mar 2013 03:37:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UDWKE-0000jW-Dl for qemu-devel@nongnu.org; Thu, 07 Mar 2013 03:37:20 -0500 Received: from mail-ee0-f53.google.com ([74.125.83.53]:61697) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UDWKE-0000jP-7G for qemu-devel@nongnu.org; Thu, 07 Mar 2013 03:37:18 -0500 Received: by mail-ee0-f53.google.com with SMTP id e53so113009eek.40 for ; Thu, 07 Mar 2013 00:37:16 -0800 (PST) Date: Thu, 7 Mar 2013 09:37:04 +0100 From: "Edgar E. Iglesias" Message-ID: <20130307083704.GA15756@zapo> References: <1362554857-3896-1-git-send-email-dantesu@gmail.com> <1362554857-3896-12-git-send-email-dantesu@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH v6 11/24] hw/nand.c: correct the sense of the BUSY/READY status bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Crosthwaite Cc: Peter Maydell , i.mitsyanko@samsung.com, qemu-devel@nongnu.org, Blue Swirl , Kuo-Jung Su , Wendy Liang , Paul Brook , Andreas , fred.konrad@greensocs.com On Thu, Mar 07, 2013 at 12:11:51PM +1000, Peter Crosthwaite wrote: > Hi Kuo Jung, Peter, > > This patch fixes bugs for us in Zynq Nand (cc Wendy Liang). Can we get > a cherry pick of this? I've applied this one. Thanks, Edgar > > Regards, > Peter > > On Wed, Mar 6, 2013 at 5:27 PM, Kuo-Jung Su wrote: > > The BIT6 of Status Register(SR): > > > > SR[6] behaves the same as R/B# pin > > SR[6] = 0 indicates the device is busy; > > SR[6] = 1 means the device is ready > > > > Some NAND flash controller (i.e. ftnandc021) relies on the SR[6] > > to determine if the NAND flash erase/program is success or error timeout. > > > > P.S: > > The exmaple NAND flash datasheet could be found at following link: > > http://www.mxic.com.tw/QuickPlace/hq/PageLibrary4825740B00298A3B.nsf/h_Index/8FEA549237D2F7674825795800104C26/$File/MX30LF1G08AA,%203V,%201Gb,%20v1.1.pdf > > > > Signed-off-by: Kuo-Jung Su > > Reviewed-by: Peter Crosthwaite > > > --- > > hw/nand.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/hw/nand.c b/hw/nand.c > > index 4a71265..61e918f 100644 > > --- a/hw/nand.c > > +++ b/hw/nand.c > > @@ -46,7 +46,7 @@ > > # define NAND_IOSTATUS_PLANE1 (1 << 2) > > # define NAND_IOSTATUS_PLANE2 (1 << 3) > > # define NAND_IOSTATUS_PLANE3 (1 << 4) > > -# define NAND_IOSTATUS_BUSY (1 << 6) > > +# define NAND_IOSTATUS_READY (1 << 6) > > # define NAND_IOSTATUS_UNPROTCT (1 << 7) > > > > # define MAX_PAGE 0x800 > > @@ -231,6 +231,7 @@ static void nand_reset(DeviceState *dev) > > s->iolen = 0; > > s->offset = 0; > > s->status &= NAND_IOSTATUS_UNPROTCT; > > + s->status |= NAND_IOSTATUS_READY; > > } > > > > static inline void nand_pushio_byte(NANDFlashState *s, uint8_t value) > > -- > > 1.7.9.5 > > > >