From: Kevin Wolf <kwolf@redhat.com>
To: Anthony Liguori <aliguori@us.ibm.com>
Cc: qemu-devel@nongnu.org, Stefan Hajnoczi <stefanha@redhat.com>
Subject: Re: [Qemu-devel] [RFC PATCH 1/8] qtest: add libqos
Date: Wed, 13 Mar 2013 12:26:59 +0100 [thread overview]
Message-ID: <20130313112659.GE2309@dhcp-200-207.str.redhat.com> (raw)
In-Reply-To: <1362491612-19226-2-git-send-email-aliguori@us.ibm.com>
Am 05.03.2013 um 14:53 hat Anthony Liguori geschrieben:
> This includes basic PCI support.
>
> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
> +static void *qpci_pc_iomap(QPCIBus *bus, QPCIDevice *dev, int barno)
> +{
> + QPCIBusPC *s = container_of(bus, QPCIBusPC, bus);
> + static const int bar_reg_map[] = {
> + PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2,
> + PCI_BASE_ADDRESS_3, PCI_BASE_ADDRESS_4, PCI_BASE_ADDRESS_5,
> + };
> + int bar_reg;
> + uint32_t addr;
> + uint64_t size;
> +
> + g_assert(barno >= 0 && barno <= 5);
> + bar_reg = bar_reg_map[barno];
> +
> + qpci_config_writel(dev, bar_reg, 0xFFFFFFFF);
> + addr = qpci_config_readl(dev, bar_reg);
> +
> + size = (1ULL << ctol(addr));
This doesn't look right. It should be something like:
size = (1ULL << ctzl(addr & ~0x3));
In fact, what must be masked out differs for I/O (0x3) and memory (0xf).
> --- /dev/null
> +++ b/tests/libqos/pci.c
> @@ -0,0 +1,108 @@
> +#include "libqos/pci.h"
> +
> +#include "hw/pci/pci_regs.h"
> +#include <glib.h>
> +
> +#include <stdio.h>
> +
> +QPCIDevice *qpci_device_find(QPCIBus *bus, int devfn)
> +{
> + QPCIDevice *dev;
> +
> + dev = g_malloc0(sizeof(*dev));
Where is the matching free? I can't seem to destroy a device I
once queried.
> + dev->bus = bus;
> + dev->devfn = devfn;
> +
> + if (qpci_config_readw(dev, PCI_VENDOR_ID) == 0xFFFF) {
> + printf("vendor id is %x\n", qpci_config_readw(dev, PCI_VENDOR_ID));
> + g_free(dev);
> + return NULL;
> + }
> +
> + return dev;
> +}
> +
> +void qpci_device_enable(QPCIDevice *dev)
> +{
> + uint16_t cmd;
> +
> + /* FIXME -- does this need to be a bus callout? */
> + cmd = qpci_config_readw(dev, PCI_COMMAND);
> + cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
> + qpci_config_writew(dev, PCI_COMMAND, cmd);
> +}
Wouldn't it make sense to enable bus mastering here as well? Forgetting
to do this manually is a trap that's easy to fall in...
Kevin
next prev parent reply other threads:[~2013-03-13 11:27 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-05 13:53 [Qemu-devel] [RFC PATCH 0/8] libqos support Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 1/8] qtest: add libqos Anthony Liguori
2013-03-13 11:26 ` Kevin Wolf [this message]
2013-03-13 14:03 ` Anthony Liguori
2013-03-28 11:41 ` Kevin Wolf
2013-03-29 2:26 ` Anthony Liguori
2013-04-09 9:15 ` Kevin Wolf
2013-03-13 12:11 ` Andreas Färber
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 2/8] i440fx-test: add test to compare default register values against spec Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 3/8] i440fx-test: add test for PAM functionality Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 4/8] pci: foreach Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 5/8] fw_cfg: add qtest test harness Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 6/8] libqos: fw_cfg Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 7/8] libqos: add fw_cfg-pc Anthony Liguori
2013-03-05 13:53 ` [Qemu-devel] [RFC PATCH 8/8] libqos: add malloc Anthony Liguori
2013-03-13 13:44 ` Kevin Wolf
2013-03-13 14:53 ` Anthony Liguori
2013-03-05 14:15 ` [Qemu-devel] [RFC PATCH 0/8] libqos support Stefan Hajnoczi
2013-03-05 14:59 ` Anthony Liguori
2013-04-22 18:38 ` Anthony Liguori
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