From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:34315) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULqWW-0003w0-F7 for qemu-devel@nongnu.org; Sat, 30 Mar 2013 03:48:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ULqWR-0003Bo-Qk for qemu-devel@nongnu.org; Sat, 30 Mar 2013 03:48:24 -0400 Received: from mail-ea0-x22d.google.com ([2a00:1450:4013:c01::22d]:35427) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ULqWR-0003Be-Jz for qemu-devel@nongnu.org; Sat, 30 Mar 2013 03:48:19 -0400 Received: by mail-ea0-f173.google.com with SMTP id k11so444778eaj.18 for ; Sat, 30 Mar 2013 00:48:18 -0700 (PDT) Date: Sat, 30 Mar 2013 08:44:38 +0100 From: "Edgar E. Iglesias" Message-ID: <20130330074438.GA21321@smtp.vpn> References: <1364609794-16753-1-git-send-email-aurelien@aurel32.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1364609794-16753-1-git-send-email-aurelien@aurel32.net> Subject: Re: [Qemu-devel] [PATCH 0/5] target-i386: add PCLMULQDQ and AES-NI instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno Cc: qemu-devel@nongnu.org On Sat, Mar 30, 2013 at 03:16:29AM +0100, Aurelien Jarno wrote: > This patch series adds the PCLMULQDQ and AES-NI instructions to the x86 > emulation. Along with the SSE4.1 and SSE4.2 series, this brings the > instructions emulation to the level of a Westmere CPU. > > It has been tested with the valgrind testsuite and with the kernel > autotest. > > Changes v1 -> v2: > - Patch 3: Declare all constant tables as static > > Changes v2 -> v3: > - Use constant tables from aes.c. > - Fix AES instructions when source and destination registers are the > same. All patches look good to me, thanks. Reviewed-by: Edgar E. Iglesias > > Aurelien Jarno (5): > target-i386: add pclmulqdq instruction > target-i386: enable PCLMULQDQ on Westmere CPU > aes: move aes.h from include/block to include/qemu > aes: make Td[0-5] and Te[0-5] tables non static > target-i386: add AES-NI instructions > > block/qcow.c | 2 +- > block/qcow2.c | 2 +- > block/qcow2.h | 2 +- > include/block/aes.h | 26 --- > include/qemu/aes.h | 45 ++++ > target-i386/cpu.c | 19 +- > target-i386/fpu_helper.c | 1 + > target-i386/ops_sse.h | 111 +++++++++ > target-i386/ops_sse_header.h | 11 + > target-i386/translate.c | 10 + > util/aes.c | 506 +++++++++++++++++++++--------------------- > 11 files changed, 443 insertions(+), 292 deletions(-) > delete mode 100644 include/block/aes.h > create mode 100644 include/qemu/aes.h > > -- > 1.7.10.4 > >