From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:57162) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UMh7s-0007tx-VC for qemu-devel@nongnu.org; Mon, 01 Apr 2013 11:58:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UMh7r-0001pg-UV for qemu-devel@nongnu.org; Mon, 01 Apr 2013 11:58:28 -0400 Received: from hall.aurel32.net ([2001:470:1f15:c4f::1]:52694) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UMgbm-0008Lz-As for qemu-devel@nongnu.org; Mon, 01 Apr 2013 11:25:18 -0400 Date: Mon, 1 Apr 2013 17:00:20 +0200 From: Aurelien Jarno Message-ID: <20130401150020.GC20665@ohm.aurel32.net> References: <1362443590-28191-1-git-send-email-rth@twiddle.net> <1362443590-28191-28-git-send-email-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1362443590-28191-28-git-send-email-rth@twiddle.net> Subject: Re: [Qemu-devel] [PATCH v2 27/27] tcg-ppc64: Implement mulu2/muls2_i64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Richard Henderson Cc: av1474@comtv.ru, qemu-devel@nongnu.org On Mon, Mar 04, 2013 at 04:33:10PM -0800, Richard Henderson wrote: > Signed-off-by: Richard Henderson > --- > tcg/ppc64/tcg-target.c | 27 +++++++++++++++++++++++++++ > tcg/ppc64/tcg-target.h | 4 ++-- > 2 files changed, 29 insertions(+), 2 deletions(-) > > diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c > index 7f3e76d..334b030 100644 > --- a/tcg/ppc64/tcg-target.c > +++ b/tcg/ppc64/tcg-target.c > @@ -2013,6 +2013,31 @@ static void tcg_out_op (TCGContext *s, TCGOpcode opc, const TCGArg *args, > } > break; > > + case INDEX_op_mulu2_i64: > + case INDEX_op_muls2_i64: > + { > + int oph = (opc == INDEX_op_mulu2_i64 ? MULHDU : MULHD); > + TCGReg outl = args[0], outh = args[1]; > + a0 = args[2], a1 = args[3]; > + > + if (outl == a0 || outl == a1) { > + if (outh == a0 || outh == a1) { > + outl = TCG_REG_R0; > + } else { > + tcg_out32(s, oph | TAB(outh, a0, a1)); > + oph = 0; > + } > + } > + tcg_out32(s, MULLD | TAB(outl, a0, a1)); > + if (oph != 0) { > + tcg_out32(s, oph | TAB(outh, a0, a1)); > + } > + if (outl != args[0]) { > + tcg_out_mov(s, TCG_TYPE_I64, args[0], outl); > + } > + } > + break; > + > default: > tcg_dump_ops (s); > tcg_abort (); > @@ -2142,6 +2167,8 @@ static const TCGTargetOpDef ppc_op_defs[] = { > > { INDEX_op_add2_i64, { "r", "r", "r", "rI", "r", "rZM" } }, > { INDEX_op_sub2_i64, { "r", "r", "rI", "r", "rZM", "r" } }, > + { INDEX_op_muls2_i64, { "r", "r", "r", "r" } }, > + { INDEX_op_mulu2_i64, { "r", "r", "r", "r" } }, > > { -1 }, > }; > diff --git a/tcg/ppc64/tcg-target.h b/tcg/ppc64/tcg-target.h > index b8cc97c..d4b0763 100644 > --- a/tcg/ppc64/tcg-target.h > +++ b/tcg/ppc64/tcg-target.h > @@ -114,8 +114,8 @@ typedef enum { > #define TCG_TARGET_HAS_movcond_i64 1 > #define TCG_TARGET_HAS_add2_i64 1 > #define TCG_TARGET_HAS_sub2_i64 1 > -#define TCG_TARGET_HAS_mulu2_i64 0 > -#define TCG_TARGET_HAS_muls2_i64 0 > +#define TCG_TARGET_HAS_mulu2_i64 1 > +#define TCG_TARGET_HAS_muls2_i64 1 > > #define TCG_AREG0 TCG_REG_R27 > Reviewed-by: Aurelien Jarno -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net