From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:39539) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNR66-00073b-UR for qemu-devel@nongnu.org; Wed, 03 Apr 2013 13:03:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UNR63-000575-QI for qemu-devel@nongnu.org; Wed, 03 Apr 2013 13:03:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:14133) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UNR63-00056e-Hn for qemu-devel@nongnu.org; Wed, 03 Apr 2013 13:03:39 -0400 Date: Wed, 3 Apr 2013 20:04:31 +0300 From: "Michael S. Tsirkin" Message-ID: <20130403170431.GB25697@redhat.com> References: <20130403103301.GG18179@redhat.com> <515C05B0.2000401@redhat.com> <20130403103846.GB18725@redhat.com> <515C1719.903@redhat.com> <20130403120041.GA22200@redhat.com> <515C1B0C.3070505@redhat.com> <20130403140648.GC22200@redhat.com> <515C37ED.1070104@redhat.com> <20130403142804.GA23848@redhat.com> <515C4EB8.8090602@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <515C4EB8.8090602@redhat.com> Subject: Re: [Qemu-devel] [PATCH 4/4] pci: add pci test device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: gleb@redhat.com, mtosatti@redhat.com, qemu-devel@nongnu.org, kvm@vger.kernel.org On Wed, Apr 03, 2013 at 05:46:00PM +0200, Paolo Bonzini wrote: > Il 03/04/2013 16:28, Michael S. Tsirkin ha scritto: > > > You need to group similar devices for the nesting to be useful. For > > > example, it should be easy to check if something is true of all ISA > > > bridges, or to do the same change in all of them. ISA and PCI bridges > > > have too little in common for that (and why not put I2C and SPI in > > > hw/bridge too :)). > > > > Yes, why not. What all bridges need to share is their modeling > > needs to be similar. That's one thing that practically > > needs to be cleaned up I think. > > Bridges are simply devices that expose their own bus, or that derive > from a class that does. But bridge is not a universal word, some buses > use controller or adapter, it would be weird to have hw/bridge/i2c or > hw/bridge/scsi (and leave two files only in hw/scsi). > > > But will this conflict with how libhw works at the moment? > > We don't want to rebuild pci for each target ... > > No, we won't. In fact, almost everything should be built once only. As > far as PCI is concerned, if it's not it is because of some really bad > hacks. For unmaintained boards, it's best to stash them in hw/ARCH. > > If we limit the amount of files that are built per-target, it works nicely. > > Paolo Well ATM it's part of libhw and is built twice. Not sure what do you propose here. -- MST