From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:36986) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1URpiI-0005Wa-5b for qemu-devel@nongnu.org; Mon, 15 Apr 2013 16:09:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1URpiD-0000Xx-4r for qemu-devel@nongnu.org; Mon, 15 Apr 2013 16:09:18 -0400 Received: from mail-ee0-f47.google.com ([74.125.83.47]:51517) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1URpiC-0000XU-OH for qemu-devel@nongnu.org; Mon, 15 Apr 2013 16:09:13 -0400 Received: by mail-ee0-f47.google.com with SMTP id t10so2402244eei.34 for ; Mon, 15 Apr 2013 13:09:12 -0700 (PDT) Date: Mon, 15 Apr 2013 22:09:07 +0200 From: "Edgar E. Iglesias" Message-ID: <20130415200907.GG26210@smtp.vpn> References: <1361817954-8984-1-git-send-email-afaerber@suse.de> <1361817954-8984-8-git-send-email-afaerber@suse.de> <516C59F1.2060209@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <516C59F1.2060209@suse.de> Subject: Re: [Qemu-devel] [PATCH qom-cpu v2 7/7] target-cris: Override do_interrupt for pre-v32 CPU cores List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?iso-8859-1?Q?F=E4rber?= Cc: qemu-devel@nongnu.org On Mon, Apr 15, 2013 at 09:50:09PM +0200, Andreas Färber wrote: > Am 25.02.2013 19:45, schrieb Andreas Färber: > > Instead of forwarding from cris_cpu_do_interrupt() to do_interruptv10(), > > override CPUClass::do_interrupt with crisv10_cpu_do_interrupt() in the > > newly introduced class_init functions. > > > > Signed-off-by: Andreas Färber > > --- > > target-cris/cpu-qom.h | 1 + > > target-cris/cpu.c | 8 ++++++++ > > target-cris/helper.c | 14 ++++++++------ > > 3 Dateien geändert, 17 Zeilen hinzugefügt(+), 6 Zeilen entfernt(-) > > Ping? Edgar, I haven't seen an ack or nack for this yet. If it's okay > with you, feel free to apply (rebased version available on my qom-cpu-9 > branch that I could alternatively include in a pull if you prefer). Sorry for the delay, It looks nice to me. Acked-by: Edgar E. Iglesias Thanks, Edgar > > Thanks, > Andreas > > > > > diff --git a/target-cris/cpu-qom.h b/target-cris/cpu-qom.h > > index deea1d8..03829bd 100644 > > --- a/target-cris/cpu-qom.h > > +++ b/target-cris/cpu-qom.h > > @@ -74,5 +74,6 @@ static inline CRISCPU *cris_env_get_cpu(CPUCRISState *env) > > #define ENV_OFFSET offsetof(CRISCPU, env) > > > > void cris_cpu_do_interrupt(CPUState *cpu); > > +void crisv10_cpu_do_interrupt(CPUState *cpu); > > > > #endif > > diff --git a/target-cris/cpu.c b/target-cris/cpu.c > > index 95cbf39..67181e5 100644 > > --- a/target-cris/cpu.c > > +++ b/target-cris/cpu.c > > @@ -169,30 +169,38 @@ static void cris_cpu_initfn(Object *obj) > > > > static void crisv8_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 8; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv9_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 9; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv10_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 10; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv11_cpu_class_init(ObjectClass *oc, void *data) > > { > > + CPUClass *cc = CPU_CLASS(oc); > > CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); > > > > ccc->vr = 11; > > + cc->do_interrupt = crisv10_cpu_do_interrupt; > > } > > > > static void crisv32_cpu_class_init(ObjectClass *oc, void *data) > > diff --git a/target-cris/helper.c b/target-cris/helper.c > > index e1ef7bc..466cc2f 100644 > > --- a/target-cris/helper.c > > +++ b/target-cris/helper.c > > @@ -45,6 +45,11 @@ void cris_cpu_do_interrupt(CPUState *cs) > > env->pregs[PR_ERP] = env->pc; > > } > > > > +void crisv10_cpu_do_interrupt(CPUState *cs) > > +{ > > + cris_cpu_do_interrupt(cs); > > +} > > + > > int cpu_cris_handle_mmu_fault(CPUCRISState * env, target_ulong address, int rw, > > int mmu_idx) > > { > > @@ -109,9 +114,10 @@ int cpu_cris_handle_mmu_fault(CPUCRISState *env, target_ulong address, int rw, > > return r; > > } > > > > -static void do_interruptv10(CPUCRISState *env) > > +void crisv10_cpu_do_interrupt(CPUState *cs) > > { > > - D(CPUState *cs = CPU(cris_env_get_cpu(env))); > > + CRISCPU *cpu = CRIS_CPU(cs); > > + CPUCRISState *env = &cpu->env; > > int ex_vec = -1; > > > > D_LOG("exception index=%d interrupt_req=%d\n", > > @@ -171,10 +177,6 @@ void cris_cpu_do_interrupt(CPUState *cs) > > CPUCRISState *env = &cpu->env; > > int ex_vec = -1; > > > > - if (env->pregs[PR_VR] < 32) { > > - return do_interruptv10(env); > > - } > > - > > D_LOG("exception index=%d interrupt_req=%d\n", > > env->exception_index, > > cs->interrupt_request); > > -- > SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany > GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg