* [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings
@ 2013-05-01 10:43 Anton Blanchard
2013-05-01 10:44 ` [Qemu-devel] [PATCH 2/2] target-ppc: Add read and write of PPR SPR Anton Blanchard
2013-05-01 22:59 ` [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Alexander Graf
0 siblings, 2 replies; 3+ messages in thread
From: Anton Blanchard @ 2013-05-01 10:43 UTC (permalink / raw)
To: qemu-ppc, qemu-devel; +Cc: agraf
Invalid and privileged SPR warnings currently print the wrong
address. While fixing that, also make it clear that we are
printing both the decimal and hexadecimal SPR number.
Before:
Trying to read invalid spr 896 380 at 0000000000000714
After:
Trying to read invalid spr 896 (0x380) at 0000000000000710
Signed-off-by: Anton Blanchard <anton@au1.ibm.com>
---
Index: b/target-ppc/translate.c
===================================================================
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -4005,19 +4005,19 @@ static inline void gen_op_mfspr(DisasCon
* allowing userland application to read the PVR
*/
if (sprn != SPR_PVR) {
- qemu_log("Trying to read privileged spr %d %03x at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
- printf("Trying to read privileged spr %d %03x at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
+ qemu_log("Trying to read privileged spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
+ printf("Trying to read privileged spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
}
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
/* Not defined */
- qemu_log("Trying to read invalid spr %d %03x at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
- printf("Trying to read invalid spr %d %03x at " TARGET_FMT_lx "\n",
- sprn, sprn, ctx->nip);
+ qemu_log("Trying to read invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
+ printf("Trying to read invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
}
}
@@ -4150,18 +4150,18 @@ static void gen_mtspr(DisasContext *ctx)
(*write_cb)(ctx, sprn, rS(ctx->opcode));
} else {
/* Privilege exception */
- qemu_log("Trying to write privileged spr %d %03x at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
- printf("Trying to write privileged spr %d %03x at " TARGET_FMT_lx
- "\n", sprn, sprn, ctx->nip);
+ qemu_log("Trying to write privileged spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
+ printf("Trying to write privileged spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG);
}
} else {
/* Not defined */
- qemu_log("Trying to write invalid spr %d %03x at "
- TARGET_FMT_lx "\n", sprn, sprn, ctx->nip);
- printf("Trying to write invalid spr %d %03x at " TARGET_FMT_lx "\n",
- sprn, sprn, ctx->nip);
+ qemu_log("Trying to write invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
+ printf("Trying to write invalid spr %d (0x%03x) at "
+ TARGET_FMT_lx "\n", sprn, sprn, ctx->nip - 4);
gen_inval_exception(ctx, POWERPC_EXCP_INVAL_SPR);
}
}
^ permalink raw reply [flat|nested] 3+ messages in thread
* [Qemu-devel] [PATCH 2/2] target-ppc: Add read and write of PPR SPR
2013-05-01 10:43 [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Anton Blanchard
@ 2013-05-01 10:44 ` Anton Blanchard
2013-05-01 22:59 ` [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Alexander Graf
1 sibling, 0 replies; 3+ messages in thread
From: Anton Blanchard @ 2013-05-01 10:44 UTC (permalink / raw)
To: qemu-ppc, qemu-devel; +Cc: agraf
Recent Linux kernels save and restore the PPR across exceptions
so we need to handle it.
Signed-off-by: Anton Blanchard <anton@au1.ibm.com>
---
Index: b/target-ppc/translate_init.c
===================================================================
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7010,6 +7010,10 @@ static void init_proc_POWER7 (CPUPPCStat
&spr_read_generic, &spr_write_generic,
&spr_read_generic, &spr_write_generic,
0x00000000);
+ spr_register(env, SPR_PPR, "PPR",
+ &spr_read_generic, &spr_write_generic,
+ &spr_read_generic, &spr_write_generic,
+ 0x00000000);
#if !defined(CONFIG_USER_ONLY)
env->slb_nr = 32;
#endif
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings
2013-05-01 10:43 [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Anton Blanchard
2013-05-01 10:44 ` [Qemu-devel] [PATCH 2/2] target-ppc: Add read and write of PPR SPR Anton Blanchard
@ 2013-05-01 22:59 ` Alexander Graf
1 sibling, 0 replies; 3+ messages in thread
From: Alexander Graf @ 2013-05-01 22:59 UTC (permalink / raw)
To: Anton Blanchard; +Cc: qemu-ppc, qemu-devel
On 01.05.2013, at 12:43, Anton Blanchard wrote:
>
> Invalid and privileged SPR warnings currently print the wrong
> address. While fixing that, also make it clear that we are
> printing both the decimal and hexadecimal SPR number.
>
> Before:
>
> Trying to read invalid spr 896 380 at 0000000000000714
>
> After:
>
> Trying to read invalid spr 896 (0x380) at 0000000000000710
>
> Signed-off-by: Anton Blanchard <anton@au1.ibm.com>
Thanks, applied both to ppc-next. Welcome to the wonderful world of QEMU ;).
Alex
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-05-01 22:59 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-05-01 10:43 [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Anton Blanchard
2013-05-01 10:44 ` [Qemu-devel] [PATCH 2/2] target-ppc: Add read and write of PPR SPR Anton Blanchard
2013-05-01 22:59 ` [Qemu-devel] [PATCH 1/2] target-ppc: Fix invalid SPR read/write warnings Alexander Graf
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).