From: David Gibson <david@gibson.dropbear.id.au>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: aik@ozlabs.ru, alex.williamson@redhat.com, mst@redhat.com,
qemu-devel@nongnu.org, agraf@suse.de
Subject: Re: [Qemu-devel] [0/8] RFC: VFIO and guest side IOMMUs, revisited
Date: Wed, 15 May 2013 13:55:41 +1000 [thread overview]
Message-ID: <20130515035541.GR14944@truffula.fritz.box> (raw)
In-Reply-To: <51920AB8.3050906@redhat.com>
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On Tue, May 14, 2013 at 11:58:16AM +0200, Paolo Bonzini wrote:
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> Il 14/05/2013 04:39, David Gibson ha scritto:
> > On Mon, May 13, 2013 at 03:30:26PM +0200, Paolo Bonzini wrote:
> >> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1
> >>
> >> Il 13/05/2013 15:13, David Gibson ha scritto:
> >>> On Mon, May 13, 2013 at 02:23:30PM +0200, Paolo Bonzini wrote:
> >>>> Il 13/05/2013 12:54, David Gibson ha scritto:
> >>>>> Specifically the way the iommu is determined from a
> >>>>> callback in the PCIBus means that it won't be assigned for
> >>>>> devices under a PCI-PCI bridge.
> >>>>
> >>>> Right. I saw the report from Alexey, but I am a bit wary of
> >>>> touching it because it's not a regression. In fact there
> >>>> is even a FIXME for it:
> >>>>
> >>>> /* FIXME: inherit memory region from bus creator */
> >>>
> >>> Uh.. sort of.
> >>>
> >>>> Perhaps we can make pci_iommu_as a Bus method, where the
> >>>> default implementation looks up along the chain, and the end
> >>>> of the recursion is in SysBus or in PCI buses that have set
> >>>> the callback.
> >>>
> >>> So, this is complicated by the fact that there are two cases,
> >>> and they can both be found in existing hardware.
> >>>
> >>> 1) One is where devices behind the bridge are not visible /
> >>> differentiable to the IOMMU, and so effectively all their DMAs
> >>> originate from the bridge device itself. In this case the
> >>> correct thing is to give all devices under the bridge the same
> >>> DMA AddressSpace as the bridge device, as suggested by the
> >>> FIXME. This will be typical behaviour for PCI-E to PCI
> >>> bridges.
> >>>
> >>> 2) The other case is where the bridge passes through RIDs, so
> >>> that the IOMMU can still differentiate devices behind it. For
> >>> this case, we really want the hook to be in the host bridge /
> >>> root bus, and it can make a decision based on the full
> >>> bus/dev/fn information. This will be typical for PCI-E to
> >>> PCI-E bridges (or switches or nexuses or whatever they're
> >>> usually called for PCI-E). This case will be very important as
> >>> we start to model newer PCI-E based machines by default, where
> >>> typically *all* devices are behind a logical p2p bridge inside
> >>> the root complex (but are still differentiable by the Intel
> >>> IOMMU amongst others).
> >>>
> >>> I'm not sure at this stage how to properly handle both cases.
> >>
> >> Suppose you have a host bridge pci_bus0 and a PCIE->PCIE bridge
> >> pci_bus1. pci_bus1 does not define a IOMMU callback, pci_bus0
> >> does.
> >>
> >> Would it work to use the PCIBus callback provided by pci_bus0,
> >> but invoke it as
> >>
> >> pci_bus0->iommu_fn(pci_bus1, pci_bus0->iommu_opaque, devfn)
> >
> > Hrm. I'm a bit nervous about that, because I think when writing
> > an iommu_fn it would be very easy to forget that it could be called
> > with a bus other than the one the hook is attached to - and e.g.
> > assuming they can use bus->qbus.parent_dev to get to the host
> > bridge.
>
> I think we can fix that by removing the opaque, and just passing in
> the PCIBus.
>
> Then it's more obvious
>
> pci_bus0->iommu_fn(pci_bus0, pci_bus1, devfn)
Yeah, that's probably ok, especially if we can think of good names for
the two bus parameters to make the distinction clear.
> and almost the same, since the host bridge is just a container_of away
> from pci_bus0.
Well, bus->qbus.parent_dev and then one of the suitable class wrappers
on container_of().
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2013-05-15 3:55 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-13 10:54 [Qemu-devel] [0/8] RFC: VFIO and guest side IOMMUs, revisited David Gibson
2013-05-13 10:54 ` [Qemu-devel] [PATCH 1/8] iommu: Fix compile error in ioapic.c David Gibson
2013-05-13 12:14 ` Paolo Bonzini
2013-05-13 10:54 ` [Qemu-devel] [PATCH 2/8] pci: Don't del_subgregion on a non subregion David Gibson
2013-05-13 12:14 ` Paolo Bonzini
2013-05-13 10:54 ` [Qemu-devel] [PATCH 3/8] pci: Rework PCI iommu lifetime assumptions David Gibson
2013-05-13 12:15 ` Paolo Bonzini
2013-05-13 10:54 ` [Qemu-devel] [PATCH 4/8] pci: Use AddressSpace rather than MemoryRegion to represent PCI DMA space David Gibson
2013-05-13 12:16 ` Paolo Bonzini
2013-05-13 10:54 ` [Qemu-devel] [PATCH 5/8] pci: Introduce helper to retrieve a PCI device's DMA address space David Gibson
2013-05-13 10:54 ` [Qemu-devel] [PATCH 6/8] memory: Sanity check that no listeners remain on a destroyed AddressSpace David Gibson
2013-05-13 11:10 ` Peter Maydell
2013-05-13 11:48 ` David Gibson
2013-05-13 12:07 ` Peter Maydell
2013-05-13 12:19 ` Paolo Bonzini
2013-05-13 12:57 ` David Gibson
2013-05-13 10:54 ` [Qemu-devel] [PATCH 7/8] vfio: Introduce VFIO address spaces David Gibson
2013-05-13 21:32 ` Alex Williamson
2013-05-14 1:00 ` David Gibson
2013-05-13 10:54 ` [Qemu-devel] [PATCH 8/8] vfio: Create VFIOAddressSpace objects as needed David Gibson
2013-05-13 21:33 ` Alex Williamson
2013-05-14 1:58 ` David Gibson
2013-05-13 12:23 ` [Qemu-devel] [0/8] RFC: VFIO and guest side IOMMUs, revisited Paolo Bonzini
2013-05-13 13:13 ` David Gibson
2013-05-13 13:30 ` Paolo Bonzini
2013-05-14 2:39 ` David Gibson
2013-05-14 9:58 ` Paolo Bonzini
2013-05-15 3:55 ` David Gibson [this message]
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