From: Bjorn Helgaas <bhelgaas@google.com>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 1/2] pcie: Use same Link Capabilities defines as Linux kernel
Date: Mon, 20 May 2013 11:09:49 -0600 [thread overview]
Message-ID: <20130520170949.29259.99889.stgit@bhelgaas-glaptop> (raw)
Linux actually doesn't have definitions for the individual L0s and L1 bits
in Link Capabilities, but if/when it does, it will use these names, which
follow the Link Control naming pattern.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
hw/pci/pcie.c | 2 +-
include/hw/pci/pcie_regs.h | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c
index 62bd0b8..54fcac8 100644
--- a/hw/pci/pcie.c
+++ b/hw/pci/pcie.c
@@ -73,7 +73,7 @@ int pcie_cap_init(PCIDevice *dev, uint8_t offset, uint8_t type, uint8_t port)
pci_set_long(exp_cap + PCI_EXP_LNKCAP,
(port << PCI_EXP_LNKCAP_PN_SHIFT) |
- PCI_EXP_LNKCAP_ASPMS_0S |
+ PCI_EXP_LNKCAP_ASPM_L0S |
PCI_EXP_LNK_MLW_1 |
PCI_EXP_LNK_LS_25);
diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h
index 4d123d9..109f2f4 100644
--- a/include/hw/pci/pcie_regs.h
+++ b/include/hw/pci/pcie_regs.h
@@ -39,8 +39,7 @@
#define PCI_EXP_LNK_MLW_1 (1 << PCI_EXP_LNK_MLW_SHIFT)
/* PCI_EXP_LINKCAP */
-#define PCI_EXP_LNKCAP_ASPMS_SHIFT (ffs(PCI_EXP_LNKCAP_ASPMS) - 1)
-#define PCI_EXP_LNKCAP_ASPMS_0S (1 << PCI_EXP_LNKCAP_ASPMS_SHIFT)
+#define PCI_EXP_LNKCAP_ASPM_L0S 0x00000400 /* L0s supported */
#define PCI_EXP_LNKCAP_PN_SHIFT (ffs(PCI_EXP_LNKCAP_PN) - 1)
next reply other threads:[~2013-05-20 17:10 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-20 17:09 Bjorn Helgaas [this message]
2013-05-20 17:09 ` [Qemu-devel] [PATCH 2/2] pcie: Add more ASPM support Bjorn Helgaas
2013-05-20 18:32 ` Michael S. Tsirkin
2013-05-20 20:44 ` Bjorn Helgaas
2013-05-21 8:45 ` Michael S. Tsirkin
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