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* [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code
@ 2013-06-09 20:56 Stefan Weil
  2013-06-09 21:22 ` Peter Maydell
  2013-06-10 11:05 ` Edgar E. Iglesias
  0 siblings, 2 replies; 3+ messages in thread
From: Stefan Weil @ 2013-06-09 20:56 UTC (permalink / raw)
  To: Peter Crosthwaite, Edgar E. Iglesias; +Cc: Stefan Weil, qemu-devel

Obviously the code wanted to mask the lower bits but failed to do so
because of a missing "<".

cppcheck detected a conditional expression which was always true (1 < 7).

Signed-off-by: Stefan Weil <sw@weilnetz.de>
---

Please review - I did not look for a Xilinx manual to see whether
the code was correct at all.

Regards,
Stefan Weil

 hw/net/xilinx_axienet.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 8989e95..2ca1511 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -575,7 +575,7 @@ static void enet_write(void *opaque, hwaddr addr,
             break;
 
         case R_MC:
-             value &= ((1 < 7) - 1);
+             value &= ((1 << 7) - 1);
 
              /* Enable the MII.  */
              if (value & MC_EN) {
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code
  2013-06-09 20:56 [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code Stefan Weil
@ 2013-06-09 21:22 ` Peter Maydell
  2013-06-10 11:05 ` Edgar E. Iglesias
  1 sibling, 0 replies; 3+ messages in thread
From: Peter Maydell @ 2013-06-09 21:22 UTC (permalink / raw)
  To: Stefan Weil; +Cc: Peter Crosthwaite, Edgar E. Iglesias, qemu-devel

On 9 June 2013 21:56, Stefan Weil <sw@weilnetz.de> wrote:
> diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
> index 8989e95..2ca1511 100644
> --- a/hw/net/xilinx_axienet.c
> +++ b/hw/net/xilinx_axienet.c
> @@ -575,7 +575,7 @@ static void enet_write(void *opaque, hwaddr addr,
>              break;
>
>          case R_MC:
> -             value &= ((1 < 7) - 1);
> +             value &= ((1 << 7) - 1);

Whoops. No objection to this patch as it stands; another option
would be
    value = extract32(value, 0, 7);

thanks
-- PMM

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code
  2013-06-09 20:56 [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code Stefan Weil
  2013-06-09 21:22 ` Peter Maydell
@ 2013-06-10 11:05 ` Edgar E. Iglesias
  1 sibling, 0 replies; 3+ messages in thread
From: Edgar E. Iglesias @ 2013-06-10 11:05 UTC (permalink / raw)
  To: Stefan Weil; +Cc: Peter Crosthwaite, qemu-devel

On Sun, Jun 09, 2013 at 10:56:20PM +0200, Stefan Weil wrote:
> Obviously the code wanted to mask the lower bits but failed to do so
> because of a missing "<".
> 
> cppcheck detected a conditional expression which was always true (1 < 7).

Applied, thanks Stefan



> 
> Signed-off-by: Stefan Weil <sw@weilnetz.de>
> ---
> 
> Please review - I did not look for a Xilinx manual to see whether
> the code was correct at all.
> 
> Regards,
> Stefan Weil
> 
>  hw/net/xilinx_axienet.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
> index 8989e95..2ca1511 100644
> --- a/hw/net/xilinx_axienet.c
> +++ b/hw/net/xilinx_axienet.c
> @@ -575,7 +575,7 @@ static void enet_write(void *opaque, hwaddr addr,
>              break;
>  
>          case R_MC:
> -             value &= ((1 < 7) - 1);
> +             value &= ((1 << 7) - 1);
>  
>               /* Enable the MII.  */
>               if (value & MC_EN) {
> -- 
> 1.7.10.4
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2013-06-10 11:05 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2013-06-09 20:56 [Qemu-devel] [PATCH] xilinx_axienet: Fix bit mask code Stefan Weil
2013-06-09 21:22 ` Peter Maydell
2013-06-10 11:05 ` Edgar E. Iglesias

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