From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51014) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1UwUHL-0005j7-TZ for qemu-devel@nongnu.org; Tue, 09 Jul 2013 05:32:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1UwUHH-0000ER-IU for qemu-devel@nongnu.org; Tue, 09 Jul 2013 05:32:11 -0400 Date: Tue, 9 Jul 2013 17:17:50 +1000 From: David Gibson Message-ID: <20130709071750.GG2696@voom.redhat.com> References: <1372315560-5478-1-git-send-email-aik@ozlabs.ru> <1372315560-5478-6-git-send-email-aik@ozlabs.ru> <871u78299c.fsf@codemonkey.ws> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Zrag5V6pnZGjLKiw" Content-Disposition: inline In-Reply-To: <871u78299c.fsf@codemonkey.ws> Subject: Re: [Qemu-devel] [PATCH 05/17] pseries: savevm support for XICS interrupt controller List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: Alexey Kardashevskiy , qemu-devel@nongnu.org, Alexander Graf , qemu-ppc@nongnu.org, Paolo Bonzini , Paul Mackerras --Zrag5V6pnZGjLKiw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Jul 08, 2013 at 01:31:59PM -0500, Anthony Liguori wrote: > Alexey Kardashevskiy writes: > > From: David Gibson [snip] > > void xics_common_cpu_setup(struct icp_state *icp, PowerPCCPU *cpu) > > { > > CPUState *cs =3D CPU(cpu); > > @@ -523,7 +578,11 @@ void xics_common_cpu_setup(struct icp_state *icp, = PowerPCCPU *cpu) > > =20 > > void xics_cpu_setup(struct icp_state *icp, PowerPCCPU *cpu) > > { > > + CPUState *cs =3D CPU(cpu); > > + struct icp_server_state *ss =3D &icp->ss[cs->cpu_index]; > > + > > xics_common_cpu_setup(icp, cpu); > > + vmstate_register(NULL, cs->cpu_index, &vmstate_icp_server, ss); >=20 > This is an indication that something is wrong. >=20 > You should tie the vmstate section to DeviceState::vmsd. You only need > to do this because you haven't converted everything to QOM yet. >=20 > Please do that to avoid these hacks. So, Alexey addressed the xics vs. xics-kvm issues. But there's another factor here. It's not clear to me how you'd QOM this component. What's being registered here is the "presentation server". That's the per-CPU part - vaguely equivalent to the LAPIC on x86. x86 doesn't have something equivalent here, because they register the LAPIC state as part of the CPU state, but we can't do that because the ICP is not bound to the CPU as tightly - a POWER7 using a different interrupt architecture would certainly be possible. So to do this with QOM, would the ICP need to be registered as a child of the cpu object? --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson --Zrag5V6pnZGjLKiw Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.13 (GNU/Linux) iEYEARECAAYFAlHbuR4ACgkQaILKxv3ab8bQLACdGvQH9V/JuQRtMYeQKK/FwXtc uH4An3xNeciyd5xpV1st3ndAx95cjQUj =+mH0 -----END PGP SIGNATURE----- --Zrag5V6pnZGjLKiw--