From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34905) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2YLX-000829-MQ for qemu-devel@nongnu.org; Thu, 25 Jul 2013 23:05:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V2YLW-00082J-Lt for qemu-devel@nongnu.org; Thu, 25 Jul 2013 23:05:35 -0400 Received: from mail-pa0-x229.google.com ([2607:f8b0:400e:c03::229]:56809) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V2YLW-00082F-Ej for qemu-devel@nongnu.org; Thu, 25 Jul 2013 23:05:34 -0400 Received: by mail-pa0-f41.google.com with SMTP id bj1so1117576pad.0 for ; Thu, 25 Jul 2013 20:05:33 -0700 (PDT) Date: Fri, 26 Jul 2013 05:05:09 +0200 From: "Edgar E. Iglesias" Message-ID: <20130726030509.GF25811@smtp.vpn> References: <1374702140-13771-1-git-send-email-afaerber@suse.de> <1374702140-13771-14-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1374702140-13771-14-git-send-email-afaerber@suse.de> Subject: Re: [Qemu-devel] [PATCH qom-next for-1.6 13/14] xilinx_uartlite: Rename xlx_uartlite to XilinxUARTLite List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?iso-8859-1?Q?F=E4rber?= Cc: Peter Crosthwaite , qemu-devel@nongnu.org On Wed, Jul 24, 2013 at 11:42:18PM +0200, Andreas Färber wrote: > Signed-off-by: Andreas Färber Acked-by: Edgar E. Iglesias > --- > hw/char/xilinx_uartlite.c | 21 ++++++++++----------- > 1 file changed, 10 insertions(+), 11 deletions(-) > > diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c > index feca497..929743c 100644 > --- a/hw/char/xilinx_uartlite.c > +++ b/hw/char/xilinx_uartlite.c > @@ -46,8 +46,7 @@ > #define CONTROL_RST_RX 0x02 > #define CONTROL_IE 0x10 > > -struct xlx_uartlite > -{ > +typedef struct XilinxUARTLite { > SysBusDevice busdev; > MemoryRegion mmio; > CharDriverState *chr; > @@ -58,9 +57,9 @@ struct xlx_uartlite > unsigned int rx_fifo_len; > > uint32_t regs[R_MAX]; > -}; > +} XilinxUARTLite; > > -static void uart_update_irq(struct xlx_uartlite *s) > +static void uart_update_irq(XilinxUARTLite *s) > { > unsigned int irq; > > @@ -71,7 +70,7 @@ static void uart_update_irq(struct xlx_uartlite *s) > qemu_set_irq(s->irq, irq); > } > > -static void uart_update_status(struct xlx_uartlite *s) > +static void uart_update_status(XilinxUARTLite *s) > { > uint32_t r; > > @@ -86,7 +85,7 @@ static void uart_update_status(struct xlx_uartlite *s) > static uint64_t > uart_read(void *opaque, hwaddr addr, unsigned int size) > { > - struct xlx_uartlite *s = opaque; > + XilinxUARTLite *s = opaque; > uint32_t r = 0; > addr >>= 2; > switch (addr) > @@ -113,7 +112,7 @@ static void > uart_write(void *opaque, hwaddr addr, > uint64_t val64, unsigned int size) > { > - struct xlx_uartlite *s = opaque; > + XilinxUARTLite *s = opaque; > uint32_t value = val64; > unsigned char ch = value; > > @@ -164,7 +163,7 @@ static const MemoryRegionOps uart_ops = { > > static void uart_rx(void *opaque, const uint8_t *buf, int size) > { > - struct xlx_uartlite *s = opaque; > + XilinxUARTLite *s = opaque; > > /* Got a byte. */ > if (s->rx_fifo_len >= 8) { > @@ -182,7 +181,7 @@ static void uart_rx(void *opaque, const uint8_t *buf, int size) > > static int uart_can_rx(void *opaque) > { > - struct xlx_uartlite *s = opaque; > + XilinxUARTLite *s = opaque; > > return s->rx_fifo_len < sizeof(s->rx_fifo); > } > @@ -194,7 +193,7 @@ static void uart_event(void *opaque, int event) > > static int xilinx_uartlite_init(SysBusDevice *dev) > { > - struct xlx_uartlite *s = FROM_SYSBUS(typeof (*s), dev); > + XilinxUARTLite *s = FROM_SYSBUS(typeof (*s), dev); > > sysbus_init_irq(dev, &s->irq); > > @@ -219,7 +218,7 @@ static void xilinx_uartlite_class_init(ObjectClass *klass, void *data) > static const TypeInfo xilinx_uartlite_info = { > .name = "xlnx.xps-uartlite", > .parent = TYPE_SYS_BUS_DEVICE, > - .instance_size = sizeof (struct xlx_uartlite), > + .instance_size = sizeof(XilinxUARTLite), > .class_init = xilinx_uartlite_class_init, > }; > > -- > 1.8.1.4 >