From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3KEq-0005An-U2 for qemu-devel@nongnu.org; Sun, 28 Jul 2013 02:13:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V3KEm-0005D0-Cn for qemu-devel@nongnu.org; Sun, 28 Jul 2013 02:13:52 -0400 Date: Sun, 28 Jul 2013 08:13:09 +0200 From: Igor Mammedov Message-ID: <20130728081309.3f904480@thinkpad> In-Reply-To: <1374890510-5479-1-git-send-email-afaerber@suse.de> References: <1374890510-5479-1-git-send-email-afaerber@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH qom-cpu for-1.6] cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?ISO-8859-1?B?RuRyYmVy?= Cc: Peter Maydell , Jia Liu , Anthony Green , qemu-devel@nongnu.org, Alexander Graf , Blue Swirl , Max Filippov , Michael Walle , "open list:PowerPC" , Paul Brook , chen.fan.fnst@cn.fujitsu.com, "Edgar E. Iglesias" , Guan Xuetao , Aurelien Jarno , Richard Henderson On Sat, 27 Jul 2013 04:01:50 +0200 Andreas F=E4rber wrote: > Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. > This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". >=20 > The reason for the failure is that CPUClass::kvm_fd is not yet > initialized in the following call graph: > ->x86_cpu_realizefn > ->x86_cpu_apic_realize > ->qdev_init > ->device_set_realized > ->device_reset (hotplugged =3D=3D 1) > ->apic_reset_common > ->vapic_base_update > ->kvm_apic_vapic_base_update > This causes attempted KVM vCPU ioctls to fail. >=20 > By contrast, in the non-hotplug case the APIC is reset much later, when > the vCPU is already initialized. >=20 > As a quick and safe solution, move the qemu_init_vcpu() call back into > the targets' realize functions. >=20 > Reported-by: Chen Fan > Signed-off-by: Andreas F=E4rber ACK for target-i386 > --- > qom/cpu.c | 2 -- > target-alpha/cpu.c | 3 +++ > target-arm/cpu.c | 4 +++- > target-cris/cpu.c | 5 +++-- > target-i386/cpu.c | 4 +++- > target-lm32/cpu.c | 6 ++++-- > target-m68k/cpu.c | 4 +++- > target-microblaze/cpu.c | 5 +++-- > target-mips/cpu.c | 5 +++-- > target-moxie/cpu.c | 5 +++-- > target-openrisc/cpu.c | 5 +++-- > target-ppc/translate_init.c | 2 ++ > target-s390x/cpu.c | 5 +++-- > target-sh4/cpu.c | 5 +++-- > target-sparc/cpu.c | 2 ++ > target-unicore32/cpu.c | 2 ++ > target-xtensa/cpu.c | 2 ++ > 17 files changed, 45 insertions(+), 21 deletions(-) >=20 > diff --git a/qom/cpu.c b/qom/cpu.c > index dbc9fb6..aa95108 100644 > --- a/qom/cpu.c > +++ b/qom/cpu.c > @@ -228,8 +228,6 @@ static void cpu_common_realizefn(DeviceState *dev, Er= ror **errp) > { > CPUState *cpu =3D CPU(dev); > =20 > - qemu_init_vcpu(cpu); > - > if (dev->hotplugged) { > cpu_synchronize_post_init(cpu); > notifier_list_notify(&cpu_added_notifiers, dev); > diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c > index 64c70bc..cfad2ea 100644 > --- a/target-alpha/cpu.c > +++ b/target-alpha/cpu.c > @@ -33,8 +33,11 @@ static void alpha_cpu_set_pc(CPUState *cs, vaddr value) > =20 > static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) > { > + CPUState *cs =3D CPU(dev); > AlphaCPUClass *acc =3D ALPHA_CPU_GET_CLASS(dev); > =20 > + qemu_init_vcpu(cs); > + > acc->parent_realize(dev, errp); > } > =20 > diff --git a/target-arm/cpu.c b/target-arm/cpu.c > index 87d35c6..5a7566b 100644 > --- a/target-arm/cpu.c > +++ b/target-arm/cpu.c > @@ -159,6 +159,7 @@ static void arm_cpu_finalizefn(Object *obj) > =20 > static void arm_cpu_realizefn(DeviceState *dev, Error **errp) > { > + CPUState *cs =3D CPU(dev); > ARMCPU *cpu =3D ARM_CPU(dev); > ARMCPUClass *acc =3D ARM_CPU_GET_CLASS(dev); > CPUARMState *env =3D &cpu->env; > @@ -214,7 +215,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error= **errp) > =20 > init_cpreg_list(cpu); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > acc->parent_realize(dev, errp); > } > diff --git a/target-cris/cpu.c b/target-cris/cpu.c > index 45f2d6b..44301a4 100644 > --- a/target-cris/cpu.c > +++ b/target-cris/cpu.c > @@ -137,10 +137,11 @@ void cris_cpu_list(FILE *f, fprintf_function cpu_fp= rintf) > =20 > static void cris_cpu_realizefn(DeviceState *dev, Error **errp) > { > - CRISCPU *cpu =3D CRIS_CPU(dev); > + CPUState *cs =3D CPU(dev); > CRISCPUClass *ccc =3D CRIS_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > ccc->parent_realize(dev, errp); > } > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index 2b59b7d..df2fb1b 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2333,6 +2333,7 @@ static void x86_cpu_apic_realize(X86CPU *cpu, Error= **errp) > =20 > static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > { > + CPUState *cs =3D CPU(dev); > X86CPU *cpu =3D X86_CPU(dev); > X86CPUClass *xcc =3D X86_CPU_GET_CLASS(dev); > CPUX86State *env =3D &cpu->env; > @@ -2387,12 +2388,13 @@ static void x86_cpu_realizefn(DeviceState *dev, E= rror **errp) > #endif > =20 > mce_init(cpu); > + qemu_init_vcpu(cs); > =20 > x86_cpu_apic_realize(cpu, &local_err); > if (local_err !=3D NULL) { > goto out; > } > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > =20 > xcc->parent_realize(dev, &local_err); > out: > diff --git a/target-lm32/cpu.c b/target-lm32/cpu.c > index 962d553..869878c 100644 > --- a/target-lm32/cpu.c > +++ b/target-lm32/cpu.c > @@ -46,10 +46,12 @@ static void lm32_cpu_reset(CPUState *s) > =20 > static void lm32_cpu_realizefn(DeviceState *dev, Error **errp) > { > - LM32CPU *cpu =3D LM32_CPU(dev); > + CPUState *cs =3D CPU(dev); > LM32CPUClass *lcc =3D LM32_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + > + qemu_init_vcpu(cs); > =20 > lcc->parent_realize(dev, errp); > } > diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c > index c0bcb0d..008d8db 100644 > --- a/target-m68k/cpu.c > +++ b/target-m68k/cpu.c > @@ -143,12 +143,14 @@ static const M68kCPUInfo m68k_cpus[] =3D { > =20 > static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) > { > + CPUState *cs =3D CPU(dev); > M68kCPU *cpu =3D M68K_CPU(dev); > M68kCPUClass *mcc =3D M68K_CPU_GET_CLASS(dev); > =20 > m68k_cpu_init_gdb(cpu); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > mcc->parent_realize(dev, errp); > } > diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c > index c75d1bd..0ef9aa4 100644 > --- a/target-microblaze/cpu.c > +++ b/target-microblaze/cpu.c > @@ -90,10 +90,11 @@ static void mb_cpu_reset(CPUState *s) > =20 > static void mb_cpu_realizefn(DeviceState *dev, Error **errp) > { > - MicroBlazeCPU *cpu =3D MICROBLAZE_CPU(dev); > + CPUState *cs =3D CPU(dev); > MicroBlazeCPUClass *mcc =3D MICROBLAZE_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > mcc->parent_realize(dev, errp); > } > diff --git a/target-mips/cpu.c b/target-mips/cpu.c > index f81f9e9..9dd47e8 100644 > --- a/target-mips/cpu.c > +++ b/target-mips/cpu.c > @@ -62,10 +62,11 @@ static void mips_cpu_reset(CPUState *s) > =20 > static void mips_cpu_realizefn(DeviceState *dev, Error **errp) > { > - MIPSCPU *cpu =3D MIPS_CPU(dev); > + CPUState *cs =3D CPU(dev); > MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > mcc->parent_realize(dev, errp); > } > diff --git a/target-moxie/cpu.c b/target-moxie/cpu.c > index 6550be5..d97a091 100644 > --- a/target-moxie/cpu.c > +++ b/target-moxie/cpu.c > @@ -45,10 +45,11 @@ static void moxie_cpu_reset(CPUState *s) > =20 > static void moxie_cpu_realizefn(DeviceState *dev, Error **errp) > { > - MoxieCPU *cpu =3D MOXIE_CPU(dev); > + CPUState *cs =3D CPU(dev); > MoxieCPUClass *mcc =3D MOXIE_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + qemu_init_vcpu(cs); > + cpu_reset(cs); > =20 > mcc->parent_realize(dev, errp); > } > diff --git a/target-openrisc/cpu.c b/target-openrisc/cpu.c > index aa269fb..075f00a 100644 > --- a/target-openrisc/cpu.c > +++ b/target-openrisc/cpu.c > @@ -66,10 +66,11 @@ static inline void set_feature(OpenRISCCPU *cpu, int = feature) > =20 > static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) > { > - OpenRISCCPU *cpu =3D OPENRISC_CPU(dev); > + CPUState *cs =3D CPU(dev); > OpenRISCCPUClass *occ =3D OPENRISC_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + qemu_init_vcpu(cs); > + cpu_reset(cs); > =20 > occ->parent_realize(dev, errp); > } > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 8215946..3c81798 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -7861,6 +7861,8 @@ static void ppc_cpu_realizefn(DeviceState *dev, Err= or **errp) > 34, "power-spe.xml", 0); > } > =20 > + qemu_init_vcpu(cs); > + > pcc->parent_realize(dev, errp); > =20 > #if defined(PPC_DUMP_CPU) > diff --git a/target-s390x/cpu.c b/target-s390x/cpu.c > index 1d16da3..9b82495 100644 > --- a/target-s390x/cpu.c > +++ b/target-s390x/cpu.c > @@ -101,10 +101,11 @@ static void s390_cpu_machine_reset_cb(void *opaque) > =20 > static void s390_cpu_realizefn(DeviceState *dev, Error **errp) > { > - S390CPU *cpu =3D S390_CPU(dev); > + CPUState *cs =3D CPU(dev); > S390CPUClass *scc =3D S390_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + qemu_init_vcpu(cs); > + cpu_reset(cs); > =20 > scc->parent_realize(dev, errp); > } > diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c > index bda3c51..34b2b57 100644 > --- a/target-sh4/cpu.c > +++ b/target-sh4/cpu.c > @@ -240,10 +240,11 @@ static const TypeInfo sh7785_type_info =3D { > =20 > static void superh_cpu_realizefn(DeviceState *dev, Error **errp) > { > - SuperHCPU *cpu =3D SUPERH_CPU(dev); > + CPUState *cs =3D CPU(dev); > SuperHCPUClass *scc =3D SUPERH_CPU_GET_CLASS(dev); > =20 > - cpu_reset(CPU(cpu)); > + cpu_reset(cs); > + qemu_init_vcpu(cs); > =20 > scc->parent_realize(dev, errp); > } > diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c > index c7b4a90..47ce60d 100644 > --- a/target-sparc/cpu.c > +++ b/target-sparc/cpu.c > @@ -743,6 +743,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Err= or **errp) > { > SPARCCPUClass *scc =3D SPARC_CPU_GET_CLASS(dev); > =20 > + qemu_init_vcpu(CPU(dev)); > + > scc->parent_realize(dev, errp); > } > =20 > diff --git a/target-unicore32/cpu.c b/target-unicore32/cpu.c > index 46813e5..3f78208 100644 > --- a/target-unicore32/cpu.c > +++ b/target-unicore32/cpu.c > @@ -92,6 +92,8 @@ static void uc32_cpu_realizefn(DeviceState *dev, Error = **errp) > { > UniCore32CPUClass *ucc =3D UNICORE32_CPU_GET_CLASS(dev); > =20 > + qemu_init_vcpu(CPU(dev)); > + > ucc->parent_realize(dev, errp); > } > =20 > diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c > index e966aa0..c19d17a 100644 > --- a/target-xtensa/cpu.c > +++ b/target-xtensa/cpu.c > @@ -90,6 +90,8 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Erro= r **errp) > =20 > cs->gdb_num_regs =3D xcc->config->gdb_regmap.num_regs; > =20 > + qemu_init_vcpu(cs); > + > xcc->parent_realize(dev, errp); > } > =20 > --=20 > 1.8.1.4 >=20 >=20 --=20 Regards, Igor