From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50207) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3ibp-0003Fc-U5 for qemu-devel@nongnu.org; Mon, 29 Jul 2013 04:15:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V3ibh-0001je-9X for qemu-devel@nongnu.org; Mon, 29 Jul 2013 04:15:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34241) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V3ibh-0001iB-1x for qemu-devel@nongnu.org; Mon, 29 Jul 2013 04:15:05 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r6T8F4oU014538 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 29 Jul 2013 04:15:04 -0400 Date: Mon, 29 Jul 2013 11:16:28 +0300 From: "Michael S. Tsirkin" Message-ID: <20130729081628.GG2308@redhat.com> References: <1374996553-21828-1-git-send-email-imammedo@redhat.com> <1374996553-21828-7-git-send-email-imammedo@redhat.com> <20130728075712.GI12087@redhat.com> <20130728102156.12db54b9@thinkpad> <20130728091142.GA14505@redhat.com> <20130728193327.5c714b7a@thinkpad> <20130728195157.GC28008@redhat.com> <20130729095532.5e669312@nial.usersys.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130729095532.5e669312@nial.usersys.redhat.com> Subject: Re: [Qemu-devel] [PATCH 6/6] pc: limit 64 bit hole to 2G by default List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: qemu-devel@nongnu.org On Mon, Jul 29, 2013 at 09:55:32AM +0200, Igor Mammedov wrote: > > > > > but not need for extra API, with fixed property definition > > > > > i.e. s/UINT64/UNIT32/ property set code will take care about limits. > > > > > > > > If you replace these with UINT32 you won't be able to > > > > specify values >4G. > > > does 32 bit PCI hole has right to be more than 4Gb? > > > > No but the 64 bit one does. 32 one shouldn't be user > > controllable at all. ... > I've meant to do it only for 32-bit PCI hole, I'm sorry for being unclear. > > [...] That's OK then.