From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60423) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V6LS4-0007uK-BT for qemu-devel@nongnu.org; Mon, 05 Aug 2013 10:08:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V6LRy-0008NL-PT for qemu-devel@nongnu.org; Mon, 05 Aug 2013 10:08:00 -0400 Received: from hall.aurel32.net ([2001:470:1f0b:4a8::1]:35182) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V6LRy-0008N3-JJ for qemu-devel@nongnu.org; Mon, 05 Aug 2013 10:07:54 -0400 Date: Mon, 5 Aug 2013 16:07:44 +0200 From: =?iso-8859-15?Q?Aur=E9lien?= Jarno Message-ID: <20130805140744.GF4193@ohm.aurel32.net> References: <51F4218A.1060802@weilnetz.de> <51F430F4.6020708@suse.de> <51F4345D.6080007@weilnetz.de> <51F6D213.8040506@weilnetz.de> <20130804220423.GA4167@ohm.aurel32.net> <51FF662B.7080706@suse.de> <20130805133150.GE4193@ohm.aurel32.net> <51FFAC73.6070600@suse.de> <51FFAE44.4000205@reactos.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <51FFAE44.4000205@reactos.org> Subject: Re: [Qemu-devel] [PATCH for-1.6] target-mips: do not raise exceptions when accessing invalid memory List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-15?Q?Herv=E9?= Poussineau Cc: qemu-devel@nongnu.org, Stefan Weil , Jan Kiszka , Andreas =?iso-8859-15?Q?F=E4rber?= , Peter Maydell On Mon, Aug 05, 2013 at 03:53:08PM +0200, Hervé Poussineau wrote: > Andreas Färber a écrit : > >>>[snip] > >>> > >>>Have you tested Jan's patches limiting the new unassigned read value -1 > >>>to PIO? > >>> > >>I have tried this patches, and they don't fix the problem. > > > >Too bad. So what do you propose? Restoring #ifdef and using > >empty_slot_init() have been suggested so far, any other concrete ideas? > > Another idea (not tested): override the > CPUClass->do_unassigned_level on board level, to only raise IBE and > no DBE. > That way, right behaviour is kept in global code, and "bad" code is > only at board level, where it can be removed later board after > board. The problem is that it looks like the code is not "bad". It seems that real hardware just ignore such accesses, so this should stay forever. -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net