From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46299) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8myT-0005Di-RT for qemu-devel@nongnu.org; Mon, 12 Aug 2013 03:55:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1V8myL-0004X6-H9 for qemu-devel@nongnu.org; Mon, 12 Aug 2013 03:55:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38743) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1V8myL-0004X2-A7 for qemu-devel@nongnu.org; Mon, 12 Aug 2013 03:55:25 -0400 Date: Mon, 12 Aug 2013 10:56:59 +0300 From: "Michael S. Tsirkin" Message-ID: <20130812075659.GA26908@redhat.com> References: <52034F73.4040904@redhat.com> <20130808083732.GB26837@redhat.com> <52035D88.6040002@redhat.com> <20130808095226.GB27298@redhat.com> <5203712C.8090202@redhat.com> <20130808141347.GA30200@redhat.com> <5203B1B7.5000102@redhat.com> <20130809041306.GB6869@morn.localdomain> <20130809154918.GA19032@redhat.com> <5208828C.6000105@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <5208828C.6000105@redhat.com> Subject: Re: [Qemu-devel] [SeaBIOS] [PATCH] acpi: hide 64-bit PCI hole for Windows XP List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gerd Hoffmann Cc: Paolo Bonzini , Kevin O'Connor , seabios@seabios.org, qemu-devel@nongnu.org, lersek@redhat.com On Mon, Aug 12, 2013 at 08:37:00AM +0200, Gerd Hoffmann wrote: > Hi, > > > If we make it a rule that PCI is`setup before ACPI tables > > are read, then QEMU can do the patching itself when > > it detects BIOS reading the tables. > > Approach makes sense to me. The ordering constrain shouldn't be a big > burden, hardware detection+bringup (including pci setup) is the first > thing done by the firmware, loading/generating acpi tables is one of the > last things. And it avoids the need to communicate the addresses (or > patch locations) between qemu+firmware. > > What do you want to use this for? pmbase and xbar are simple, they are > just a single register read. pci io windows needs a root bus scan, but > should be doable too. Right. We'll need to migrate the offsets for patching since they are tied to specific AML and this can change. > > Gerd, Laszlo,others, does this rule work for alternative firmwares? > > It surely works for coreboot, and I would be very surprised if this > causes trouble for ovmf. > > cheers, > Gerd