[Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Benoît Canet]

Hi,

I noticed that the l3 cache size of a guest /proc/cpuinfo is not the same as
the l3 cache size of the host.

I did not found any references to this in the qemu and KVM code.

Is the size of the guest L3 cache fixed in hardware ?

Can a patch be written to set it ?

Similarly I noticed that the frequency in the guest was not reflecting the
frequency scaling of the host.

Could anything be done for this ? 

Best regards

Benoît

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Gleb Natapov]

On Tue, Aug 13, 2013 at 08:17:13PM +0200, Benoît Canet wrote:
> 
> Hi,
> 
> I noticed that the l3 cache size of a guest /proc/cpuinfo is not the same as
> the l3 cache size of the host.
> 
> I did not found any references to this in the qemu and KVM code.
> 
> Is the size of the guest L3 cache fixed in hardware ?
> 
No, it is hardcoded somewhere in qemu cpuid code.

> Can a patch be written to set it ?
> 
Yes.

> Similarly I noticed that the frequency in the guest was not reflecting the
> frequency scaling of the host.
> 
Not sure what you mean here. Frequency as seen where?

> Could anything be done for this ? 
> 
> Best regards
> 
> Benoît

--
			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Benoît Canet]

Hi,

Thanks for the answer.

> On Tue, Aug 13, 2013 at 08:17:13PM +0200, Benoît Canet wrote:
> > 
> > Hi,
> > 
> > I noticed that the l3 cache size of a guest /proc/cpuinfo is not the same as
> > the l3 cache size of the host.
> > 
> > I did not found any references to this in the qemu and KVM code.
> > 
> > Is the size of the guest L3 cache fixed in hardware ?
> > 
> No, it is hardcoded somewhere in qemu cpuid code.
> 
> > Can a patch be written to set it ?
> > 
> Yes.

Ok I'll try to do that.

> 
> > Similarly I noticed that the frequency in the guest was not reflecting the
> > frequency scaling of the host.
> > 
> Not sure what you mean here. Frequency as seen where?

The frequency seen in the host /proc/cpuinfo and the guest /proc/cpuinfo differs
when a governor kick the cpu frequency scaling: the guest still show the maximum
frequency of the cpu.

Could this value be reflected dynamically ?

Best regards

Benoît

> 
> > Could anything be done for this ? 
> > 
> > Best regards
> > 
> > Benoît
> 
> --
> 			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Gleb Natapov]

On Mon, Aug 26, 2013 at 02:49:41PM +0200, Benoît Canet wrote:
> 
> Hi,
> 
> Thanks for the answer.
> 
> > On Tue, Aug 13, 2013 at 08:17:13PM +0200, Benoît Canet wrote:
> > > 
> > > Hi,
> > > 
> > > I noticed that the l3 cache size of a guest /proc/cpuinfo is not the same as
> > > the l3 cache size of the host.
> > > 
> > > I did not found any references to this in the qemu and KVM code.
> > > 
> > > Is the size of the guest L3 cache fixed in hardware ?
> > > 
> > No, it is hardcoded somewhere in qemu cpuid code.
> > 
> > > Can a patch be written to set it ?
> > > 
> > Yes.
> 
> Ok I'll try to do that.
> 
Talk to Eduardo since this is related to cpuid configuration and he is
an expert.

> > 
> > > Similarly I noticed that the frequency in the guest was not reflecting the
> > > frequency scaling of the host.
> > > 
> > Not sure what you mean here. Frequency as seen where?
> 
> The frequency seen in the host /proc/cpuinfo and the guest /proc/cpuinfo differs
> when a governor kick the cpu frequency scaling: the guest still show the maximum
> frequency of the cpu.
> 
KVM does not emulate frequency scaling. It does not make sense for a
guest.

> Could this value be reflected dynamically ?
> 
Not sure frequency scaling can be implemented only for read.

--
			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Benoît Canet]

> Talk to Eduardo since this is related to cpuid configuration and he is
> an expert.

I found the following in target-i386/cpu.c

    case 0x80000006:
        /* cache info (L2 cache) */
        *eax = 0;
        *ebx = 0x42004200;
        *ecx = 0x02008140;
        *edx = 0;
        break;

>From the AMD cpuid book it look like the L3 settings are not defined (edx).

Eduardo: A user I know want to be able to set the size of the guest L3 cache.
I am ok to write a patch to do so.

Do you have some recommandations regarding the other fields of the edx register ?
What would be an acceptable user interface to set this ?

Best regards

Benoît

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Eduardo Habkost]

On Mon, Aug 26, 2013 at 06:45:27PM +0200, Benoît Canet wrote:
> > Talk to Eduardo since this is related to cpuid configuration and he is
> > an expert.
> 
> I found the following in target-i386/cpu.c
> 
>     case 0x80000006:
>         /* cache info (L2 cache) */
>         *eax = 0;
>         *ebx = 0x42004200;
>         *ecx = 0x02008140;
>         *edx = 0;
>         break;
> 
> From the AMD cpuid book it look like the L3 settings are not defined (edx).
> 
> Eduardo: A user I know want to be able to set the size of the guest L3 cache.
> I am ok to write a patch to do so.
> 
> Do you have some recommandations regarding the other fields of the edx register ?

Probably it will be a good idea to let each CPU model have their own
defaults for the cache information.

> What would be an acceptable user interface to set this ?

Things I can remember from the top of my head:

 * It would be interesting to redo this patch, before doing anything else:
   https://github.com/ehabkost/qemu-hacks/commit/10b675fa1269a65a553586545fdbcd95ace79d65
 * We need to keep compatibility on existing machine-types (not change
   the cache size);
 * If some information is reported on multiple CPUID leaves, we need to
   keep them consistent with each other (see the FIXME comments on the
   URL above);
 * Please use QOM properties to allow the cache sizes/topologies to be set.

-- 
Eduardo

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Benoît Canet]

Hello Eduardo,

I read a bit about caches on wikipedia.

If I understand correctly changing the CPUID L3 cache infos in QEMU will change
the value displayed in the guest /proc/cpuinfo but will not change the size of
the l3 cache used by the hardware. So I am chasing a cosmetic bug.
If it right ?

> > Do you have some recommandations regarding the other fields of the edx register ?
> 
> Probably it will be a good idea to let each CPU model have their own
> defaults for the cache information.

Do you mean querying the host CPUID registers and forwarding the values to the
guest ?

> 
> > What would be an acceptable user interface to set this ?
> 
> Things I can remember from the top of my head:
> 
>  * It would be interesting to redo this patch, before doing anything else:
>    https://github.com/ehabkost/qemu-hacks/commit/10b675fa1269a65a553586545fdbcd95ace79d65
>  * We need to keep compatibility on existing machine-types (not change
>    the cache size);
>  * If some information is reported on multiple CPUID leaves, we need to
>    keep them consistent with each other (see the FIXME comments on the
>    URL above);
I could write a patch to fix broken CPUID leaves.

But how would it work regarding compatibility ? Is it right to just fix the
leaves or does the machine type rule apply here ?

Best regards

Benoît

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Gleb Natapov]

On Tue, Aug 27, 2013 at 03:18:16PM +0200, Benoît Canet wrote:
> 
> Hello Eduardo,
> 
> I read a bit about caches on wikipedia.
> 
> If I understand correctly changing the CPUID L3 cache infos in QEMU will change
> the value displayed in the guest /proc/cpuinfo but will not change the size of
> the l3 cache used by the hardware. So I am chasing a cosmetic bug.
> If it right ?
> 
Right.

--
			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Gleb Natapov]

On Tue, Aug 27, 2013 at 04:17:56PM +0300, Gleb Natapov wrote:
> On Tue, Aug 27, 2013 at 03:18:16PM +0200, Benoît Canet wrote:
> > 
> > Hello Eduardo,
> > 
> > I read a bit about caches on wikipedia.
> > 
> > If I understand correctly changing the CPUID L3 cache infos in QEMU will change
> > the value displayed in the guest /proc/cpuinfo but will not change the size of
> > the l3 cache used by the hardware. So I am chasing a cosmetic bug.
> > If it right ?
> > 
> Right.
> 
Well, actually not entirely. An application can query cache sizes and
adjust its algorithms accordingly in which case performance can be
suboptimal if information in a guest is not accurate.

--
			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Benoît Canet]

> > > If I understand correctly changing the CPUID L3 cache infos in QEMU will change
> > > the value displayed in the guest /proc/cpuinfo but will not change the size of
> > > the l3 cache used by the hardware. So I am chasing a cosmetic bug.
> > > If it right ?
> > > 
> > Right.
> > 
> Well, actually not entirely. An application can query cache sizes and
> adjust its algorithms accordingly in which case performance can be
> suboptimal if information in a guest is not accurate.

So maybe what is missing is a CPUID passthrough mode triggered when -cpu host
is used ?

Best regards

Benoît

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Gleb Natapov]

On Tue, Aug 27, 2013 at 03:35:33PM +0200, Benoît Canet wrote:
> > > > If I understand correctly changing the CPUID L3 cache infos in QEMU will change
> > > > the value displayed in the guest /proc/cpuinfo but will not change the size of
> > > > the l3 cache used by the hardware. So I am chasing a cosmetic bug.
> > > > If it right ?
> > > > 
> > > Right.
> > > 
> > Well, actually not entirely. An application can query cache sizes and
> > adjust its algorithms accordingly in which case performance can be
> > suboptimal if information in a guest is not accurate.
> 
> So maybe what is missing is a CPUID passthrough mode triggered when -cpu host
> is used ?
> 
That is missing too, but it should not be default with other CPU models.

--
			Gleb.

Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq

[Eduardo Habkost]

On Tue, Aug 27, 2013 at 03:18:16PM +0200, Benoît Canet wrote:
[...]
> > > Do you have some recommandations regarding the other fields of the edx register ?
> > 
> > Probably it will be a good idea to let each CPU model have their own
> > defaults for the cache information.
> 
> Do you mean querying the host CPUID registers and forwarding the values to the
> guest ?

No, I mean that it would make sense to have "-cpu 486" expose a
different cache topology from "-cpu Haswell" by default.

But a "forward host cache information to guest" mode may be useful, too,
and it could be the default mode for "-cpu host".

> 
> > 
> > > What would be an acceptable user interface to set this ?
> > 
> > Things I can remember from the top of my head:
> > 
> >  * It would be interesting to redo this patch, before doing anything else:
> >    https://github.com/ehabkost/qemu-hacks/commit/10b675fa1269a65a553586545fdbcd95ace79d65
> >  * We need to keep compatibility on existing machine-types (not change
> >    the cache size);
> >  * If some information is reported on multiple CPUID leaves, we need to
> >    keep them consistent with each other (see the FIXME comments on the
> >    URL above);
> I could write a patch to fix broken CPUID leaves.
> 
> But how would it work regarding compatibility ? Is it right to just fix the
> leaves or does the machine type rule apply here ?

Yes, if you change anything guest-visible, you need to keep
compatibility on older machine-types.

-- 
Eduardo