From: "Benoît Canet" <benoit.canet@irqsave.net>
To: Gleb Natapov <gleb@redhat.com>
Cc: "Benoît Canet" <benoit.canet@irqsave.net>,
pbonzini@redhat.com, qemu-devel@nongnu.org,
"Eduardo Habkost" <ehabkost@redhat.com>
Subject: Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq
Date: Mon, 26 Aug 2013 18:45:27 +0200 [thread overview]
Message-ID: <20130826164526.GB5418@irqsave.net> (raw)
In-Reply-To: <20130826143320.GA22899@redhat.com>
> Talk to Eduardo since this is related to cpuid configuration and he is
> an expert.
I found the following in target-i386/cpu.c
case 0x80000006:
/* cache info (L2 cache) */
*eax = 0;
*ebx = 0x42004200;
*ecx = 0x02008140;
*edx = 0;
break;
>From the AMD cpuid book it look like the L3 settings are not defined (edx).
Eduardo: A user I know want to be able to set the size of the guest L3 cache.
I am ok to write a patch to do so.
Do you have some recommandations regarding the other fields of the edx register ?
What would be an acceptable user interface to set this ?
Best regards
Benoît
next prev parent reply other threads:[~2013-08-26 16:43 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-13 18:17 [Qemu-devel] KVM guest cpu L3 cache and cpufreq Benoît Canet
2013-08-26 12:40 ` Gleb Natapov
2013-08-26 12:49 ` Benoît Canet
2013-08-26 14:33 ` Gleb Natapov
2013-08-26 16:45 ` Benoît Canet [this message]
2013-08-26 20:47 ` Eduardo Habkost
2013-08-27 13:18 ` Benoît Canet
2013-08-27 13:17 ` Gleb Natapov
2013-08-27 13:20 ` Gleb Natapov
2013-08-27 13:35 ` Benoît Canet
2013-08-27 13:39 ` Gleb Natapov
2013-08-27 13:37 ` Eduardo Habkost
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