From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54719) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VDztC-0004Rx-0a for qemu-devel@nongnu.org; Mon, 26 Aug 2013 12:43:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VDzt6-0004DN-2J for qemu-devel@nongnu.org; Mon, 26 Aug 2013 12:43:37 -0400 Received: from nodalink.pck.nerim.net ([62.212.105.220]:32830 helo=paradis.irqsave.net) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VDzt5-0004Cx-ML for qemu-devel@nongnu.org; Mon, 26 Aug 2013 12:43:31 -0400 Date: Mon, 26 Aug 2013 18:45:27 +0200 From: =?iso-8859-1?Q?Beno=EEt?= Canet Message-ID: <20130826164526.GB5418@irqsave.net> References: <20130813181713.GA5204@irqsave.net> <20130826124031.GB22977@redhat.com> <20130826124941.GA5418@irqsave.net> <20130826143320.GA22899@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20130826143320.GA22899@redhat.com> Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] KVM guest cpu L3 cache and cpufreq List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: =?iso-8859-1?Q?Beno=EEt?= Canet , pbonzini@redhat.com, qemu-devel@nongnu.org, Eduardo Habkost > Talk to Eduardo since this is related to cpuid configuration and he is > an expert. I found the following in target-i386/cpu.c case 0x80000006: /* cache info (L2 cache) */ *eax =3D 0; *ebx =3D 0x42004200; *ecx =3D 0x02008140; *edx =3D 0; break; >>From the AMD cpuid book it look like the L3 settings are not defined (edx= ). Eduardo: A user I know want to be able to set the size of the guest L3 ca= che. I am ok to write a patch to do so. Do you have some recommandations regarding the other fields of the edx re= gister ? What would be an acceptable user interface to set this ? Best regards Beno=EEt