qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Antony Pavlov <antonynpavlov@gmail.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Alex Dumitrache <broscutamaker@gmail.com>,
	Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
	Giovanni Condello <condellog@gmail.com>,
	g3gg0 <georg.hofstetter@lx-networking.de>,
	QEMU Developers <qemu-devel@nongnu.org>,
	Paul Brook <paul@codesourcery.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [RFC 1/5] target-arm: add ARM946E-S CPU
Date: Fri, 30 Aug 2013 12:06:26 +0400	[thread overview]
Message-ID: <20130830120626.340368a974d82d0a96ce1de2@gmail.com> (raw)
In-Reply-To: <CAFEAcA9GaO=hU3cxaaOrmKgru80QRZFAjVQpBr0raWOBAU2+ng@mail.gmail.com>

On Fri, 30 Aug 2013 08:29:09 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:

> On 30 August 2013 06:09, Peter Crosthwaite <peter.crosthwaite@xilinx.com> wrote:
> > On Fri, Aug 30, 2013 at 4:17 AM, Antony Pavlov <antonynpavlov@gmail.com> wrote:
> >> If Magic Lantern or CHDK need some specific initial CPU CP15 register state
> >> then we can fix it in the platform code without defining new CPU type.
> >>
> >> Any comments?
> >
> > Object properties the solution?
> 
> Well, if we need them, yes, but as I say there is no other board
> using our 946 so the simplest thing is probably to make that 946 model
> behave the way this board's CPU does.

I just propose postpone this event as just now there is no user (CHDK or Magic Lantern)
that can get any good of this change.
w
-- 
Best regards,
  Antony Pavlov

  reply	other threads:[~2013-08-30  8:08 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-29  9:33 [Qemu-devel] [RFC 0/5] add initial support for Canon DIGIC SoC Antony Pavlov
2013-08-29  9:33 ` [Qemu-devel] [RFC 1/5] target-arm: add ARM946E-S CPU Antony Pavlov
2013-08-29 10:44   ` Peter Maydell
2013-08-29 10:52     ` Antony Pavlov
2013-08-29 18:17     ` Antony Pavlov
2013-08-30  5:09       ` Peter Crosthwaite
2013-08-30  7:29         ` Peter Maydell
2013-08-30  8:06           ` Antony Pavlov [this message]
2013-08-29  9:33 ` [Qemu-devel] [RFC 2/5] hw/arm: add very initial support for Canon DIGIC SoC Antony Pavlov
2013-08-29 12:15   ` Andreas Färber
2013-08-29 19:36     ` Antony Pavlov
2013-08-29 20:16       ` Peter Maydell
2013-08-30  5:07         ` Peter Crosthwaite
2013-08-30  8:10           ` Antony Pavlov
2013-08-30 17:53           ` Andreas Färber
2013-08-30 16:27       ` Andreas Färber
2013-08-29 14:29   ` Condello
2013-08-29 16:22     ` Antony Pavlov
2013-08-29  9:33 ` [Qemu-devel] [RFC 3/5] hw/arm/digic: add timer support Antony Pavlov
2013-08-29  9:33 ` [Qemu-devel] [RFC 4/5] hw/arm/digic: add UART support Antony Pavlov
2013-08-30  5:16   ` Peter Crosthwaite
2013-08-30  8:31     ` Antony Pavlov

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20130830120626.340368a974d82d0a96ce1de2@gmail.com \
    --to=antonynpavlov@gmail.com \
    --cc=broscutamaker@gmail.com \
    --cc=condellog@gmail.com \
    --cc=georg.hofstetter@lx-networking.de \
    --cc=paul@codesourcery.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.crosthwaite@xilinx.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).