From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50153) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VIdMM-0002Es-Aw for qemu-devel@nongnu.org; Sun, 08 Sep 2013 07:41:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VIdMG-0000Xt-8P for qemu-devel@nongnu.org; Sun, 08 Sep 2013 07:40:54 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51424) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VIdMG-0000XX-0y for qemu-devel@nongnu.org; Sun, 08 Sep 2013 07:40:48 -0400 Date: Sun, 8 Sep 2013 14:40:44 +0300 From: Gleb Natapov Message-ID: <20130908114044.GF17294@redhat.com> References: <1378386382-415-1-git-send-email-pbonzini@redhat.com> <1378386382-415-2-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1378386382-415-2-git-send-email-pbonzini@redhat.com> Subject: Re: [Qemu-devel] [PATCH uq/master 1/2] x86: fix migration from pre-version 12 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org, ehabkost@redhat.com On Thu, Sep 05, 2013 at 03:06:21PM +0200, Paolo Bonzini wrote: > On KVM, the KVM_SET_XSAVE would be executed with a 0 xstate_bv, > and not restore anything. > XRSTOR restores FP/SSE state to reset state if no bits are set in xstate_bv. This is what should happen on reset, no? > Since FP and SSE data are always valid, set them in xstate_bv at reset > time. In fact, that value is the same that KVM_GET_XSAVE returns on > pre-XSAVE hosts. It is needed for migration between non xsave host to xsave host. > > Signed-off-by: Paolo Bonzini > --- > target-i386/cpu.c | 1 + > target-i386/cpu.h | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/target-i386/cpu.c b/target-i386/cpu.c > index c36345e..ac83106 100644 > --- a/target-i386/cpu.c > +++ b/target-i386/cpu.c > @@ -2386,6 +2386,7 @@ static void x86_cpu_reset(CPUState *s) > env->fpuc = 0x37f; > > env->mxcsr = 0x1f80; > + env->xstate_bv = XSTATE_FP | XSTATE_SSE; > > env->pat = 0x0007040600070406ULL; > env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; > diff --git a/target-i386/cpu.h b/target-i386/cpu.h > index 5723eff..a153078 100644 > --- a/target-i386/cpu.h > +++ b/target-i386/cpu.h > @@ -380,6 +380,11 @@ > > #define MSR_VM_HSAVE_PA 0xc0010117 > > +#define XSTATE_SUPPORTED (XSTATE_FP|XSTATE_SSE|XSTATE_YMM) Supported by whom? By QEMU? We should filer unsupported bits from CPUID.0D then too. > +#define XSTATE_FP 1 > +#define XSTATE_SSE 2 > +#define XSTATE_YMM 4 > + > /* CPUID feature words */ > typedef enum FeatureWord { > FEAT_1_EDX, /* CPUID[1].EDX */ > -- > 1.8.3.1 > -- Gleb.