From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35541) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJOMK-0007v8-CJ for qemu-devel@nongnu.org; Tue, 10 Sep 2013 09:52:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJOMC-0003Zm-LW for qemu-devel@nongnu.org; Tue, 10 Sep 2013 09:52:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:25874) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJOMC-0003Zc-CF for qemu-devel@nongnu.org; Tue, 10 Sep 2013 09:51:52 -0400 Received: from int-mx12.intmail.prod.int.phx2.redhat.com (int-mx12.intmail.prod.int.phx2.redhat.com [10.5.11.25]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r8ADppSn005231 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 10 Sep 2013 09:51:51 -0400 Date: Tue, 10 Sep 2013 16:53:58 +0300 From: "Michael S. Tsirkin" Message-ID: <20130910135358.GD2196@redhat.com> References: <1378291667-8516-1-git-send-email-mst@redhat.com> <1378291667-8516-2-git-send-email-mst@redhat.com> <20130910153712.060a23b4@nial.usersys.redhat.com> <20130910134636.GB2196@redhat.com> <20130910154613.08cf585f@nial.usersys.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130910154613.08cf585f@nial.usersys.redhat.com> Subject: Re: [Qemu-devel] [PATCH 1/6] q35: make pci window address/size match guest cfg List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: qemu-devel@nongnu.org On Tue, Sep 10, 2013 at 03:46:13PM +0200, Igor Mammedov wrote: > On Tue, 10 Sep 2013 16:46:36 +0300 > "Michael S. Tsirkin" wrote: > > > On Tue, Sep 10, 2013 at 03:37:12PM +0200, Igor Mammedov wrote: > > > On Wed, 4 Sep 2013 13:48:29 +0300 > > > "Michael S. Tsirkin" wrote: > > > > > > > For Q35, MMCFG address and size are guest configurable. > > > > Update w32 property to make it behave accordingly. > > > > > > > > Signed-off-by: Michael S. Tsirkin > > > > --- > > > > hw/pci-host/q35.c | 10 ++++++++++ > > > > 1 file changed, 10 insertions(+) > > > > > > > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > > > > index 4febd24..3f1d447 100644 > > > > --- a/hw/pci-host/q35.c > > > > +++ b/hw/pci-host/q35.c > > > > @@ -214,6 +214,16 @@ static void mch_update_pciexbar(MCHPCIState *mch) > > > > } > > > > addr = pciexbar & addr_mask; > > > > pcie_host_mmcfg_update(pehb, enable, addr, length); > > > > + /* Leave enough space for the MCFG BAR */ > > > > + /* > > > > + * TODO: this matches current bios behaviour, but it's not a power of two, > > > > + * which means an MTRR can't cover it exactly. > > > > + */ > > > > + if (enable) { > > > > + mch->pci_info.w32.begin = addr + length; > > > > + } else { > > > > + mch->pci_info.w32.begin = MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT; > > > > + } > > > > } > > > I probably miss something but where is remapping in system address space? > > > If there is none then, then updated w32 might mismatch actually/initially mapped alias. > > > > > > > /* PAM */ > > > > You mean mmcfg? > > The re-mapping is in hw/pci/pcie_host.c > no, I mean 32-bit PCI hole It works differently - see mch_init. 32-bit PCI hole is not remapped - instead mmcfg overlaps it and shadows a chunk of it.