From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43500) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJOke-0004Vo-Lh for qemu-devel@nongnu.org; Tue, 10 Sep 2013 10:17:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJOkY-0003wy-Mi for qemu-devel@nongnu.org; Tue, 10 Sep 2013 10:17:08 -0400 Received: from mx1.redhat.com ([209.132.183.28]:28194) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJOkY-0003ws-EI for qemu-devel@nongnu.org; Tue, 10 Sep 2013 10:17:02 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r8AEH1LZ019622 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Tue, 10 Sep 2013 10:17:02 -0400 Date: Tue, 10 Sep 2013 17:19:06 +0300 From: "Michael S. Tsirkin" Message-ID: <20130910141906.GB2750@redhat.com> References: <1378291667-8516-1-git-send-email-mst@redhat.com> <1378291667-8516-6-git-send-email-mst@redhat.com> <20130910161209.327bdab3@nial.usersys.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130910161209.327bdab3@nial.usersys.redhat.com> Subject: Re: [Qemu-devel] [PATCH 5/6] q35: use 64 bit window programmed by guest List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: qemu-devel@nongnu.org On Tue, Sep 10, 2013 at 04:12:09PM +0200, Igor Mammedov wrote: > On Wed, 4 Sep 2013 13:48:40 +0300 > "Michael S. Tsirkin" wrote: > > > Detect the 64 bit window programmed by firmware > > and configure properties accordingly. > > > > Signed-off-by: Michael S. Tsirkin > > --- > > hw/pci-host/q35.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > > index 3f1d447..5cb1e8a 100644 > > --- a/hw/pci-host/q35.c > > +++ b/hw/pci-host/q35.c > > @@ -90,6 +90,9 @@ static void q35_host_get_pci_hole64_start(Object *obj, Visitor *v, > > Error **errp) > > { > > Q35PCIHost *s = Q35_HOST_DEVICE(obj); > > + PCIHostState *h = PCI_HOST_BRIDGE(obj); > > + > > + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64); > Shouldn't be it done at the time when BIOS initializes BAR, to avoid > inconsistent state in between write and read. What's inconsistent with what? We just report the current state. If you query it during initialization, you get what has been programmed so far. > Also missing remapping of existing 64-bit PCI hole alias to a new range. We shouldn't remap the region - this is not how hardware works. This property merely reports what BIOS decided to use. > > > > visit_type_uint64(v, &s->mch.pci_info.w64.begin, name, errp); > > } > > @@ -99,6 +102,9 @@ static void q35_host_get_pci_hole64_end(Object *obj, Visitor *v, > > Error **errp) > > { > > Q35PCIHost *s = Q35_HOST_DEVICE(obj); > > + PCIHostState *h = PCI_HOST_BRIDGE(obj); > > + > > + pci_bus_get_w64_range(h->bus, &s->mch.pci_info.w64); > ditto > > > > > visit_type_uint64(v, &s->mch.pci_info.w64.end, name, errp); > > }