From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJfvi-00062B-17 for qemu-devel@nongnu.org; Wed, 11 Sep 2013 04:37:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1VJfvc-0001C9-Vt for qemu-devel@nongnu.org; Wed, 11 Sep 2013 04:37:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:6061) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1VJfvc-0001C3-NY for qemu-devel@nongnu.org; Wed, 11 Sep 2013 04:37:36 -0400 Date: Wed, 11 Sep 2013 10:37:08 +0200 From: Igor Mammedov Message-ID: <20130911103708.3e954423@nial.usersys.redhat.com> In-Reply-To: <52302916.2040109@suse.de> References: <1378846139-22187-1-git-send-email-ehabkost@redhat.com> <20130911102223.0a51a7bb@nial.usersys.redhat.com> <52302916.2040109@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH] target-i386: set model=6 on qemu64 & qemu32 CPU models List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Andreas =?ISO-8859-1?B?RuRyYmVy?= Cc: Andrea Arcangeli , Eduardo Habkost , qemu-devel@nongnu.org On Wed, 11 Sep 2013 10:25:58 +0200 Andreas F=E4rber wrote: > Am 11.09.2013 10:22, schrieb Igor Mammedov: > > On Tue, 10 Sep 2013 17:48:59 -0300 > > Eduardo Habkost wrote: > >=20 > >> There's no Intel CPU with family=3D6,model=3D2, and Linux and Windows = guests > >> disable SEP when seeing that combination due to Pentium Pro erratum #8= 2. > >> > >> In addition to just having SEP ignored by guests, Skype (and maybe oth= er > >> applications) runs sysenter directly without passing through ntdll on > >> Windows, and crashes because Windows ignored the SEP CPUID bit. > >> > >> So, having model > 2 is a better default on qemu64 and qemu32 for two > >> reasons: making SEP really available for guests, and avoiding crashing > >> applications that work on bare metal. > >> > >> model=3D3 would fix the problem, but it causes CPU enumeration problems > >> for Windows guests[1]. So this patch sets model=3D6, that matches "Ath= lon > >> (PM core)" on AMD and "P2 with on-die L2 cache" on Intel and it allows > >> Windows to use all CPUs as well as fixing sysenter. > >> > >> [1] https://bugzilla.redhat.com/show_bug.cgi?id=3D508623 > >> > >> Cc: Andrea Arcangeli > >> Signed-off-by: Eduardo Habkost > >> --- > >> include/hw/i386/pc.h | 8 ++++++++ > >> target-i386/cpu.c | 4 ++-- > >> 2 files changed, 10 insertions(+), 2 deletions(-) > >> > >> diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h > >> index 7fb04d8..195e962 100644 > >> --- a/include/hw/i386/pc.h > >> +++ b/include/hw/i386/pc.h > >> @@ -258,6 +258,14 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); > >> .driver =3D TYPE_X86_CPU,\ > >> .property =3D "pmu",\ > >> .value =3D "on",\ > >> + },{\ > >> + .driver =3D "qemu64-" TYPE_X86_CPU,\ > >> + .property =3D "model",\ > >> + .value =3D stringify(2),\ > >> + },{\ > >> + .driver =3D "qemu32-" TYPE_X86_CPU,\ > >> + .property =3D "model",\ > >> + .value =3D stringify(3),\ > >> } > >> =20 > >> #define PC_COMPAT_1_4 \ >=20 > Shouldn't this hunk be in PC_COMPAT_1_6 rather than alongside PMU, which > I believe was for 1_5? grr, you are right. my reviewed-by stands, provided compats are moved to PC_COMPAT_1_6. > Andreas >=20 > >> diff --git a/target-i386/cpu.c b/target-i386/cpu.c > >> index c36345e..36cfbce 100644 > >> --- a/target-i386/cpu.c > >> +++ b/target-i386/cpu.c > >> @@ -544,7 +544,7 @@ static x86_def_t builtin_x86_defs[] =3D { > >> .level =3D 4, > >> .vendor =3D CPUID_VENDOR_AMD, > >> .family =3D 6, > >> - .model =3D 2, > >> + .model =3D 6, > >> .stepping =3D 3, > >> .features[FEAT_1_EDX] =3D > >> PPRO_FEATURES | > >> @@ -647,7 +647,7 @@ static x86_def_t builtin_x86_defs[] =3D { > >> .level =3D 4, > >> .vendor =3D CPUID_VENDOR_INTEL, > >> .family =3D 6, > >> - .model =3D 3, > >> + .model =3D 6, > >> .stepping =3D 3, > >> .features[FEAT_1_EDX] =3D > >> PPRO_FEATURES, > >=20 > > Reviewed-By: Igor Mammedov > >=20 >=20 >=20